The electronic market is continuously expanding, forcing designers to get their products to market faster. This time-to-market demand, coupled with increasing design complexity, has forced designers to re-examine their development process; traditional simulation and verification methods no longer meet a project's system and deadline requirements.
Designers at Alcatel Telecom, an industry leader in telecommunications equipment, recently faced this challenge. Alcatel engineers needed to speed the development process of their 1570 BB Cablephone, an optical communications system that transmits and distributes broadband services (i.e., cable TV and sound radio) as well as narrowband services (i.e., POTS, ISDN, 2 MBps G.703, and leased lines), via optical fibers. Designers of the 1570 BB Cablephone needed a flexible hardware solution for performing system integration and manufacturing tests.
To perform these functions, designers of the 1570 BB Cablephone created two development boards, the hardware simulator and development kit, which contain Altera FLEX 10K, FLEX 8000, and MAX 7000 devices. The Alcatel design team liked Altera devices because they permit vertical migration and allow easy testing. In addition, Altera devices are supported by the easy-to-use MAX+PLUS® II development system, which provides seamless integration with the Synopsys Design Compiler that is already used by Alcatel engineers.
Hardware Simulator
Alcatel designers needed a way to test their design before building the ASIC-based hardware. The hardware simulator enabled the design team to build a real-time hardware model of the signal processing function and complete hardware tests. The hardware simulator is described below:
- 233 mm × 210 mm development board with 200,000 gates (See Figure 1)
- Four EPF10K50 devices
- One EPM7032 device
- Two slots for standard SIMM memory modules
- Two voltage-controlled oscillators (48,640 MHz and 16,384 MHz)
- On-board power-up reset circuit
- Area for user applications
Figure 1. 233 mm × 210 mm Development Board with 200,000 Gates
To achieve the highest performance, Alcatel engineers divided the hardware simulator's functional modules and implemented them in four EPF10K50RC240-4 devices. Because these devices are pin-compatible with FLEX 10K devices in other speed grades and densities (e.g., EPF10K70 and EPF10K100 devices), the engineers can increase the density of the hardware simulator to 400,000 gates without redesigning the board. The EPM7032LC44 device provides the clock tree and can be used for the division and distribution of the system clock.
The Alcatel designers were able to use the hardware simulator prototyping board and the MAX+PLUS II development system to determine which signal processing algorithm to use in the ASIC. The designers tested several signal processing algorithms written in MATLAB and VHDL and created several co-simulations. The prototyping board offers the capability to implement emulation models, which enables real-time signal processing. The emulated signal processing algorithm became part of the new ASIC generation.
Development Kit
Alcatel Telecom needed a way to perform system integration tests while the ASIC hardware was still in production. The development kit enabled the engineers to perform system integration tests within a real environment under real-time conditions-all long before the ASIC hardware was available. The designers were able to convert some of the ASIC functions written in VHDL, implement the functions in EPF81188 devices, and perform the system integration within a matter of days. The development kit contains the following items:
- 233 mm × 160 mm development board with 20,000 gates (See Figure 2)
- Two EPF81188 devices
- Two voltage-controlled oscillators (both 16,384 MHz)
- On-board power-on reset circuit
- Area for user applications
Figure 2. 233 mm × 160 mm Development Board with 20,000 Gates
With the emulation model based on the prototyping board, the designers were able to completely debug their software design. Nine weeks later, the ASIC hardware was available and regression tests of the software were performed without difficulties.
Late in the system integration cycle, Alcatel discovered some problems with one ASIC on the PCB; the implemented phase-locked loop (PLL) circuit seemed to be causing problems, but software simulations could not detect the cause. To find the problem, the designers used the development kit prototyping board to create a hardware implementation of the PLL circuit. It took only two days for the designers to convert the ASIC design, implement it in the EPF81188 devices, and find the cause of the problem. Alcatel was then able to create a workaround and incorporate it into the design.
After the system design was complete, Alcatel needed to build electronic tools to test the PCB assemblies. The development kit prototyping board provided an easy way to build test equipment because Altera-based prototyping boards are much cheaper and more flexible than common signal generators. The development kit became part of several electronic test tools and was used during the development process to test the PCB assemblies of the Alcatel 1570 BB Cablephone. Later in the manufacturing phase, the development kit was used in the automatic test system for manufacturing tests.
Conclusion
Altera devices provided an easy way for Alcatel designers to perform system integration and manufacturing tests. While the ASIC design and hardware are still extremely useful in speeding the development process of the 1570 BB Cablephone, Alcatel is planning to sell both development boards on the market.
