For Release: March 16, 1998
Altera Unveils Enhanced FLEX 10KE PLD Family
- Dual-Port RAM for Higher Performance and Efficiency
- 250,000-Gate Density, 66 MHz Performance Ideal for System-Level Designs
San Jose, Calif., March 16, 1998 -- Altera Corporation (Nasdaq: ALTR) today announced its FLEX® 10KE family of high-performance, high-density programmable logic devices, an enhanced version of the original FLEX 10K embedded programmable logic family. The FLEX 10KE family is developed using a deep sub-micron 0.25-micron process and five-layer metal. The family will maintain its unique embedded architecture and offer low cost, 66 MHz in-system performance, and densities up to 250,000 gates. The FLEX 10KE embedded array blocks (EABs) will offer a doubled amount of RAM, as well as dual-port RAM capability.
"The FLEX 10KE family will provide increased performance, as well as added enhancements that will extend Altera’s leadership to new levels of performance and silicon efficiency," said Cliff Tong, Altera’s vice president of product marketing. "We believe the combination of density, performance, and price offered by the FLEX 10KE family, coupled with the inherent time-to-market benefits of programmable logic, will accelerate the movement of designs from masked gate arrays to programmable logic."
Density & Performance
The FLEX 10KE family will offer densities from 30,000 to 250,000 gates. "These densities are needed to integrate system-level functionality on a chip," said Craig Lytle, Altera’s senior director of applications and product planning. "Taking advantage of a 0.25-micron process, the FLEX 10KE family offers both cost improvements and 66 MHz PCI (peripheral component interface) performance needed for advanced communications applications such as 100 Mbit and 1 Gbit Ethernet connections."
Embedded Array Blocks with Dual-Port RAM
The FLEX 10KE family features dual-port RAM that is configured for 4,000 bits and 16-bit wide configuration flexibility within each EAB. These enhancements will offer high performance and efficiency for dual-port RAM applications, wide shallow FIFOs, and will meet designers’ ever-increasing memory block needs. RAM capacity ranges from 24K bits in the EPF10K30E, to 80K in the largest device, the EPF10K250E.
"Metal-Friendly" Architecture Means Smaller Die Sizes
The FLEX 10KE family features Altera’s "metal-friendly" architecture, with transistor-free metal interconnect that makes optimum use of multi-layer process technology. The transistor-heavy interconnect found in FPGAs explodes device die size, sacrificing both cost effectiveness and performance. The smaller process geometry and metal efficiency of the FLEX 10KE results in a die that is 40% smaller than the equivalent FLEX 10KA device and less than half the size of a comparable FPGA.
MultiVolt I/O Interface & Lower Power Consumption
The core supply voltage of FLEX 10KE devices is 2.5 volts. However, in today’s printed circuit boards, designers mix conventional 5.0-V devices with newer, lower voltage parts. All FLEX 10KE devices will feature Altera’s MultiVolt™ I/O interface, enabling core operation at 2.5 volts, while the I/O pins will be compatible with 2.5-V, 3.3-V, or 5.0-V devices. This will be key to enabling the seamless flow of designs to the new family. As an added benefit, this lower core voltage also reduces power consumption by more than 75%.
Pricing & Availability
Software support for Altera’s FLEX 10KE devices is projected to be available in Q298, with first device shipments beginning in June. Projected 1999 volume pricing is to begin at $12.50.
|
Device |
Gates |
Logic Elements |
RAM Bits |
|
EPF10K30E |
30,000 |
1,728 |
24,576 |
|
EPF10K50E |
50,000 |
2,880 |
40,960 |
|
EPF10K100E |
100,000 |
4,992 |
49,152 |
|
EPF10K130E |
130,000 |
6,656 |
65,536 |
|
EPF10K200E |
200,000 |
9,984 |
98,304 |
|
EPF10K250E |
250,000 |
12,160 |
81,920 |
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally written in the future tense and/or are preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation, the risk that planned process technologies and products based on those process technologies will not be introduced as currently anticipated, that reductions in costs will not be sufficient to support projected pricing, that product development will not be completed according to the current schedule, that the Company’s products will not be met with market acceptance, and that the Company will not be successful in competing in the gate array market. Please refer to the Company’s Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.
About Altera
Altera Corporation, founded in 1983, is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computers, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR. More information on Altera can be obtained on the worldwide web at http://www.altera.com. A photograph is available at http://www.newscom.com.
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