For Release: March 2, 1998
Altera's AMPP Program Announces New Telecommunication & Bus Interface Functions
- NComm, Inc. Offers Parameterized ToneGen Telecom Megafunction
- New IEEE 1394 Solutions from Phoenix Technologies Ltd. & Simple Silicon Inc.
San Jose, Calif., March 2, 1998--Altera Corporation (Nasdaq: ALTR) today announced two new partners and four new megafunctions in the industry-leading Altera Megafunction Partners Program (AMPPSM).
NComm, Inc. (NCI) enters the AMPP program with over 15 years experience in designing programmable logic for telecommunications applications, including switching systems, transmission equipment, and PBXs. Headquartered in Salem, New Hampshire, NCI has already implemented Altera's recently announced MegaWizardTM Plug-In tool in developing a parameterized tone generation megafunction called ToneGen. The ToneGen megafunction can generate any combination of single and/or dual frequency tone sequences, such as dialtone, ringback, busy, DTMF, and MF, as well as any other standard or custom tone sequence. ToneGen outputs an ST-Bus compatible serial stream, supports gain control, Mu-law or A-law encoding, and other parameters on a tone by tone basis, providing complete control over the tones being generated. "The MegaWizard Plug-In included with ToneGen implements an algorithm which automates the creation and assignment of all 67 tone parameters, eliminating what had been a tedious task for T1 and PBX designers," said Bill Matern, president of NCI.
ToneGen is economically implemented in Altera's FLEX® 10K family of high-density embedded programmable logic devices (PLDs). A typical implementation on a FLEX 10K20 consumes 445 logic cells and four embedded array blocks. Pricing for an encrypted netlist begins at $4,995; an encrypted evaluation, enabled by Altera's OpenCoreTM capability, is available at no cost by contacting NCI directly at (603) 893-6186 or by e-mail at info@ncomm.com.
Simple Silicon Inc (Cupertino, Calif.) also joins AMPP
and provides expertise in IEEE 1394 Physical and Link Layer controllers. "IEEE 1394 is a revolutionary bus architecture which is considered by many to form the first and last 10 feet of the information superhighway while other networks, including ATM, form the rest of it," said Gyan Tiwary, president of Simple Silicon. The company's Si-Link megafunction is a hardware implementation of the Link Layer Protocol and includes Node Controller and Transaction Layer protocols. It supports both isochronous and asynchronous data transfers with speeds of 100 Mbps on an Altera FLEX 10K100 device. Simple Silicon has plans to introduce several networking application cores at data rates of 400 Mbps for IEEE 1394, including a bridge between ATM and 1394. All functional emulation and verification of Simple Silicon cores are performed using Altera FLEX 10K PLDs. For more information, including pricing and prototyping boards, please contact Simple Silicon directly at (408) 873-2260 or visit its web site at http://www.simplesi.com.
New IEEE 1394a Solution
AMPP partner Phoenix Technologies Ltd. (San Jose, Calif.) has successfully demonstrated its VirtualLINK 1394a synthesizable core in an Altera FLEX 10K70 device running at 50 MHz and exchanging data at 200 Mbps. Altera is assisting Phoenix Technologies in a project to achieve a 400 Mbps data rate for IEEE 1394, a first for programmable logic. "We expect IEEE 1394 designs to accelerate in the near term and see programmable logic playing a key role in the communication and networking markets," said Bob Beachler, Altera's director of development tools marketing. "We were impressed that Phoenix designers capitalized on the Altera FLEX 10K device features to attain a 50MHz threshold in its current demonstration, which was shown last month at DesignCon and IEEE 1394 Conference."
The VirtualLINK megafunction supports commercially available 1394 PHY chips, necessary for complete implementation. Phoenix supplies a complete 1394 solution including an evaluation board, BIOS extensions, platform management, and validation through the Virtual Chips 1394 LINK Test Environment. For more details, including pricing, contact Phoenix directly at http://www.phoenix.com.
About AMPP
The Altera Megafunction Partners Program, established in August 1995, was created to bring the advantages of design reuse to users of Altera PLDs. AMPP is an alliance between Altera and developers of synthesizable megafunctions that encourages megafunction development. Altera provides technical information and training to the AMPP partners, who create commonly used megafunctions, which are targeted for Altera programmable logic devices. More information about AMPP is available on the Altera web site.
About Altera
Altera Corporation, founded in 1983, is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computers, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR. More information on Altera can be obtained on the worldwide web at http://www.altera.com.
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