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For Release: August 9, 1999
Altera Ships APEX EP20K200 PLD for High Performance Applications
- Provides Product-Term Logic, LUT-Based Logic and Embedded Memory for Fast
System-On-A-Programmable-Chip™ Operation
- High Performance and Aggressive Pricing Make EP20K200 Device the PLD of
Choice for High-Bandwidth Communications Applications
- Ideal for Use in Fast-Growing Switch, Router Markets
San Jose, Calif., August 9, 1999--Altera Corporation (NASDAQ: ALTR) today announced
shipment of the 200,000-gate EP20K200, the newest member of Altera's
APEX™ 20K family of programmable logic devices (PLDs). With 200,000
typical gates (526,000 maximum system gates) and 64-bit, 66 MHz PCI compliance,
the EP20K200 PLD is an ideal platform for system designs in the communications
infrastructure that require both fast time-to-market and high performance, for
instance, next-generation switches and routers.
"We believe the industry-leading performance and aggressive pricing will make
the EP20K200 an ideal choice for logic integration, especially in the communications
market, which requires ever-increasing bandwidth," said Craig Leclair, Altera
director of components marketing. "This device has all the System-on-a-Programmable-Chip
benefits of the APEX architecture, in a density ideal for system designs throughout
the communications infrastructure."
According to Dataquest, the worldwide market for application-specific products
in LAN switches and routers will grow nearly 22 percent annually during the
five-year period from 1997 to 2002. In the same period, worldwide growth in
application-specific products serving the WAN market will top 45 percent. Altera's
EP20K200 PLDs should meet the needs of many of these applications.
Based on an advanced 0.22-micron, six-layer-metal process, the EP20K200 device
features 8,320 logic elements (LEs) and over 100,000 RAM bits. The high-performance
EP20K200 PLD has up to 382 maximum user I/O pins, is 64-bit, 66 MHz PCI compliant
and operates at 2.5 volts. It also includes MultiVolt™ I/O support for
both 2.5- and 3.3-volt interfaces.
About EP20K200 Device
The EP20K200 is the third member of the APEX 20K family of System-on-a-Programmable-Chip
devices. All devices in the APEX family feature Altera's unique MultiCore™
architecture, which combines logic elements and memory into large blocks called
MegaLAB™ structures. Each MegaLAB structure is connected to all others
in the device via Altera's continuous FastTrack® interconnect
routing structure. Each embedded system block (ESB) within a MegaLAB structure
contains 2,048 programmable bits; these bits can be configured to support product-terms,
dual port RAM or ROM. In addition, the EP20K200 features an enhanced phase-locked
loop (PLL) that allows multiplications of 1x, 2x and 4x to enable the high performance
needed for a wide variety of high-performance applications including state-of-the-art
communications applications.
New Design Tools
The entire APEX family is fully supported by Altera's
fourth-generation development environment, Quartus™. The Quartus software
was developed to support system-level designs, and features good-as-native links
to industry-leading third-party tools from Exemplar Logic, Model Technology,
Synopsys,
Synplicity,
Viewlogic, and other leading EDA vendors.
Altera's Quartus development environment is distributed at no extra cost to
current subscribers of Altera's
development tools program. Annual subscription rates for the program are
$2,000 for a node-locked PC license, which includes Altera's Quartus and MAX+PLUS®
II development environments and 12 months of upgrades and technical support.
Efficient IP Integration
By implementing IP as easy-to-use parameterized cores, designers can reduce
overall design time and focus more of their efforts on value-added parts of
the system. Altera offers this IP in the form of Altera-developed MegaCore megafunctions
and optimized cores from third-party Altera Megafunction Partner Program (AMPPSM)
members. Altera MegaCore megafunctions and AMPP cores include PCI and other
bus interfaces, processors and peripherals, DSP cores, and communications functions.
Altera's Quartus design environment simplifies IP integration through its OpenCore™
test-drive feature, MegaWizard™ Plug-in manager, and CoreSyn™ synthesis
algorithm. The CoreSyn feature is a revolutionary algorithm that targets elements
of the design to the performance-optimizing PLD construct (look-up table, product
term, or memory block) within the APEX architecture.
Availability, Packaging, & Pricing
The EP20K200 is shipping now in the 208- and 240-pin RQFP packages. Other packaging
options include 356-pin BGA and 484-pin FineLine BGA™. Projected year
2000 volume pricing is expected to begin at $50.
Safe Harbor Notice
This press release contains "forward looking statements" which are made pursuant
to the safe harbor provisions of the Private Securities Litigation Reform Act
of 1995. Forward looking statements are generally preceded by words such as
"expects," "believes," "anticipates," "projects," or "intends." Investors are
cautioned that all forward-looking statements in this release involve risks
and uncertainty, including without limitation the risks that the Company's products
will not satisfy customer demands, that other companies will develop products
with higher densities than those offered by the Company, and that yields will
not be sufficient to support projected pricing. Please refer to the Company's
Securities and Exchange Commission filings, copies of which are available from
the Company without charge, for further information.
About Altera
Altera Corporation, The Programmable Solutions Company™, was founded
in 1983 and is a worldwide leader in high-performance, high-density programmable
logic devices and associated computer aided engineering (CAE) logic development
tools. Programmable logic devices are semiconductor chips that offer on-site
programmability to customers. The chips are programmed using tools that run
on personal computers or engineering work stations. User benefits include ease
of use, lower risk, and fast time-to-market. The company offers the broadest
line of CMOS programmable logic devices that address high-speed, high-density,
and low-power applications. Altera products serve a broad range of markets,
including telecommunications, data communications, computer peripherals, and
industrial applications. Altera common stock is traded on the Nasdaq Stock Market
under the symbol ALTR.
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