For Release: March 22, 2000
Altera and Palmchip Partner to Speed Time-to-Market For System-On-A-Programmable-Chip Integration
Palmchip's PalmPak™ Platform Enables Fast Interconnect of Multi-Sourced IP
San Jose, Calif., March 22, 2000--Altera Corporation (Nasdaq: ALTR) and Palmchip Corporation today announced their partnership to provide the industry's first system-on-a programmable-chip (SOPC) development platform for programmable logic devices (PLDs). Palmchip joins the Altera Megafunction Partners Program (AMPPSM) and Altera joins Palmchip's DirectConnect™ Partner Program. Through the Altera AMPP program, Palmchip will make available its PalmPak™ development platform to Altera customers, enabling intellectual property (IP) cores to be combined quickly and easily through a high-performance core interconnect scheme. The PalmPak™ platform accelerates development of complex subsystems or complete SOPC solutions for Altera customers and shortens development time by up to six months, a 45 percent enhancement over many of today's conventional approaches.
"Our partnership with Palmchip speeds time-to-market by providing a better design infrastructure for next-generation SOPC applications," said Cliff Tong, vice president of corporate marketing at Altera. "Previously used for ASIC and ASSP designs, the Palmchip development platform can now be employed with Altera's high-density APEX™ PLD architecture bringing customers the inherent flexibility of programmable logic and much needed time-to-market advantages in application areas such as VoIP packet processing, 3G wireless, and xDSL equipment."
"The marriage of our 'pre-built' PalmPak™ integration platform with Altera's APEX PLD architecture is significant for the industry in terms of offering a new, easy-to-use tool," said Melissa Jones, vice president of marketing at Palmchip. "The density and flexibility of Altera's APEX family helps designers create and verify single device solutions utilizing a wide choice of IP cores in a matter of days. This puts a lot of power into the designers' hands and opens up many creative possibilities."
Partnership Discloses Roadmap Enabling Faster Time-to-Market
Palmchip and Altera plan to make other IP cores available through the AMPP program later in 2000. These cores include Palmchip's QuickConfig™ memory controller subsystem and an IDE host controller. The memory controller subsystem (PALM-CG-7400) enables fast development of a complete memory controller supporting popular memory types and configurations. It integrates several configurable functions: memory type controller, arbiter, DMA controller and processor interface. The controller supports DDRAM, SDRAM, DRAM, Flash, SSRAM and ROM devices, as well as multiple backside host interfaces and memory banks.
The IDE host controller (PALM-BK-3710) includes all digital circuitry needed for a complete interface between a host processor system and an IDE- or ATAPI-compatible hard drive subsystem or device. It includes parallel I/O (PIO), multi-word direct memory access (DMA) and Ultra ATA-33 interface circuitry. An optimized version of the controller supports ATA-100 and will be available in Q3 2000.
About the PalmPak™ Fast SOC Development Platform
The CoreFrame®-based integration platform contains all the peripheral functions required for a basic system-on-a-chip design. Features include the CoreFrame® architecture with a PalmChannel™ controller, a CPU-MChannel, a DMA Channel, a Flash/SRAM memory controller and a basic hardware/software verification test bench.
Available in early Q2 2000, Palmchip will introduce a new development board that features an Altera APEX 20K400 device to provide hardware verification for SOPC designs based on the PalmPak™ platform. To further accelerate customer development of its platforms, Palmchip is making its PalmPak™ development platform available on a Coreboard™ for Simutech's RAVE system. The RAVE system uses Altera programmable logic to support its reconfigurable prototyping system.
The Altera Megafunction Partners Program
The program was established in August 1995 to bring the advantages of design re-use to Altera customers. It is an alliance between Altera and developers of IP cores that encourages megafunction development. Altera provides technical and marketing information to partners, who create and support IP cores targeted for Altera programmable logic devices. Currently there are 30 AMPP partners who offer over 100 megafunctions.
About Simutech
Simutech is focused on providing desktop IP and internet-based verification tools to leading electronics systems, semiconductor, and IP companies. Simutech's products enable IP evaluation, hardware-software co-development and full SOC verification. Its mission is to help bring SOC to the mainstream designers by providing a new generation of relatively low-cost, easy-to-use solutions to address the largest bottleneck to system-on-a-chip design. For more information about Simutech, please visit http://www.simutech.com.
About Palmchip
Palmchip Corporation develops and licenses configurable semiconductor IP (intellectual property) for embedded system-on-chip ICs used in networking, portable communications and computing and mass storage applications. The company offers specialized IP blocks and subsystems, general-purpose integration platforms, FlexiSOC™ application-specific integration platforms and full-service turnkey production. Palmchip's IP is based on its CoreFrameÒ interconnect architecture. This technology is independent of processor, I/O or foundry, allowing designers tremendous flexibility in porting IP from multiple sources. Palmchip DirectConnect™ partners offer a wide range of third-party IP, software and design tools that are compatible with the CoreFrame® architecture. Palmchip is a privately held company based in San Jose, California (USA) and is a member of the Virtual Socket Interface Alliance and VCX. More information can be obtained at http://www.palmchip.com.
|
文档资料
> 
