The Altera® Monitor Program allows students to easily compile and debug both assembly language and C programs. It displays the status of the Nios II processor as programs are executed, such as the contents of processor registers and system memory. It allows the user to single step through a program and set breakpoints.
This software is available as a part of the University Program Design Suite. The suite also contains the University Program IP Cores and example computer systems.
The following table shows the available materials. Some of the material exist in multiple versions, dependent on a hardware description language (Verilog or VHDL). Use the filters below to choose the ones that are appropriate for your course.
| Filter Materials | ||
| Choose HDL: |
| Table 1. Altera Monitor Program Materials for Quartus II 9.0 and 9.1 | |
| Title | Downloads |
|---|---|
| Tutorials | |
| Altera Monitor Program Tutorial | |
| Using HAL Device Drivers with the Monitor Program | |
| Tools | |
| University Program Design Suite | EXE |
| University Program Design Suite | EXE |
