The university textbook Fundamentals of Digital Logic with VHDL Design by Stephen Brown and Zvonko Vranesic, published by McGraw Hill, aims to provide a balance between teaching the basic concepts of designing digital logic circuits and practicing their application with CAD tools.
Included with the textbook is a CD-ROM containing Altera's MAX+PLUS® II version 9.23 Student Edition programmable logic development software and all of the design examples from the book.
Fundamentals of Digital Logic with VHDL Design teaches students both the fundamental concepts of classical manual digital design and modern digital circuit design using CAD tools. Even though modern designers no longer use manual techniques, the book aims to give students an appreciation of how digital circuits operate and for the types of manipulation that are performed by CAD tools.
The book features:
- Detailed coverage of Boolean algebra and the classical methods for synthesis of combinational circuits, arithmetic circuits, synchronous sequential circuits, asynchronous sequential circuits, and design for testability
- Emphasis on hardware description language (HDL)-based design as the most efficient design method
- In-depth coverage of modern integrated circuit technology, with emphasis on CMOS and design for programmable logic devices (CPLDs and FPGAs)
- Design implementation examples for students (using actual chips)
- Detailed description of VHDL with more than 100 examples of complete VHDL code
- A large number of problems for each chapter
- Three progressively more advanced tutorials for MAX+PLUS II software
Altera's MAX+PLUS II software is a fully integrated design environment that offers unmatched flexibility and performance. The intuitive graphical interface is complemented by complete and instantly accessible online documentation, which makes learning and using MAX+PLUS II software quick and easy.
The MAX+PLUS II version 9.23 Student Edition software offers the following features:
- Operates on stand-alone PCs running Windows 95/98, and Windows NT 3.51 and 4.0
- Design entry includes graphical and text-based, including the Altera® Hardware Description Language (AHDL), VHDL, and Verilog HDL
- Design compilation for product-term and look-up table device architectures, with device support for members of the Altera FLEX 10K®, FLEX® 6000, MAX® 7000, and MAX 7000S device families
- Design verification with full timing and functional simulation
