Altera提供FPGA, CPLD和ASIC解决方案
  • 下载
  • 文档资料
  • 产品
    • 器件
    • 设计软件
    • IP
    • 开发套件/电缆
    • 设计和支持服务
    • 资料
  • 最终市场
    • 汽车
    • 广播
    • 计算机和存储
    • 消费类
    • 工业
    • 医疗
    • 军事和航空航天
    • 测试和测量
    • 无线通信
    • 有线通信
  • 技术中心
    • DSP
    • 外部存储器
    • 嵌入式处理
    • 收发器
    • 并行I/O
    • 信号完整性
    • 系统集成
  • 教育与活动
    • 培训中心
    • 大学计划
    • 网络研讨会和视频
    • 演示
    • 活动日程
  • 支持
    • 设计和支持资源指南
    • 知识数据库
    • 器件
    • 软件
    • IP
    • 开发套件和电缆
    • 设计范例
    • 参考设计
    • 下载
    • 用户社区和论坛
    • mySupport
  • 公司介绍
    • 关于我们
    • 客户成功案例
    • 合作伙伴
    • 新闻中心
    • 投资者关系
    • 保护环境
    • 职位招聘
    • 联系我们
  • 在线购买
    • 器件
    • 设计软件
    • 开发和教育套件
    • 电缆和可编程硬件
    • IP
  • 全部页面
  • 产品型号
  • 知识数据库
  • 支持&技术资料
  • 论坛 & Wiki

Fundamentals of Digital Logic with Verilog Design

主页 > 教育与活动 > 大学计划 > 数字设计教材 > Fundamentals of Digital Logic with Verilog Design

The university textbook Fundamentals of Digital Logic with Verilog Design by Stephen Brown and Zvonko Vranesic, published by McGraw Hill, is intended for an introductory course in digital logic design. It emphasizes the synthesis of circuits and explains how circuits are implemented in real chips. Fundamental concepts are illustrated by using small examples. Verilog is used to show how practical circuits are designed using CAD tools.

Use of CAD software is well integrated into the book. The CAD software provides automatic mapping of a design written in Verilog into FPGAs and CPLDs. Students will be able to try, firsthand, the book's Verilog examples (over 140) and homework problems.

Included with the textbook is a CD-ROM containing Altera's MAX+PLUS® II version 9.23 Student Edition programmable logic development software and all of the design examples from the book. Engineers currently use MAX+PLUS II software for designing, simulating, testing, and implementing logic circuits. The version included with this text supports all major features of the commercial product and comes with a compiler for the IEEE standard Verilog language.

Students will be able to:

  • Enter a design into the CAD system
  • Compile the design into a selected device
  • Simulate the functionality and timing of the resulting circuit
  • Implement the design in actual devices (using the school's laboratory facilities)

Verilog

Verilog is a complex language, so it is introduced gradually in the book. Each Verilog feature is presented as it becomes pertinent for the circuits being discussed. To teach the student to use MAX+PLUS II software, the book includes three tutorials.

MAX+PLUS II Software

MAX+PLUS II software is a fully integrated design environment that offers unmatched flexibility and performance. The intuitive graphical interface is complemented by complete and instantly accessible online documentation, which makes learning and using MAX+PLUS II software quick and easy.

MAX+PLUS II version 9.23 Student Edition software offers the following features:

  • Operates on stand-alone PCs running Windows 95/98, and Windows NT 3.51 and 4.0
  • Design entry includes graphical and text-based, including the Altera® Hardware Description Language (AHDL), VHDL, and Verilog HDL
  • Design compilation for product-term and look-up table (LUT)-based device architectures, with device support for members of the Altera FLEX 10K®, FLEX® 6000, MAX® 7000, and MAX 7000S device families
  • Design verification with full timing and functional simulation
给本页评分


  • 大学计划在中国
    • 简介
    • 联合实验室及培训中心
    • 年度活动
      • 大学会议
      • 亚洲创新设计大赛
      • 电子设计文章竞赛
  • 支持
    • 概要
    • 常见问题
    • 设计范例
  • 大学计划成员
    • 申请表
  • 教学材料
    • 概要
    • 教学指南与实验练习
    • 开发板和教育板
    • 设计软件
      • Quartus II
      • Nios II
      • IP核
    • 课本
  • 研究合作伙伴
    • 概要
    • QUIP
    请填写反馈意见
    产品 | 最终市场 | 技术中心 | 教育与活动 | 支持 | 公司介绍 | 在线购买
    联系我们 | 站点帮助 | 网站导航 | 个人信息 | 法律申明
    Copyright © 1995-2010 Altera International Limited. 版权所有
    Altera Forum
    Altera
    论坛
    RSS
    RSS
    Flickr
    Flickr
    Email Updates
    电邮新闻