Code:DSP - Video, Image, and Signal Processing Net Seminar Series
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Original Broadcast Dates: November 1, 2, and 9, 2006
Time: 11:00 AM Pacific Time
Featured Technology: DSP Solutions
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Partner Presenters:
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Overview
Altera hosts this three-part net seminar series on video, image, and signal processing featuring experts from Altera, The MathWorks, and 4i2i. The next generation of FPGA solutions will enable designers to develop architectures that boost digital signal processing (DSP) performance and lower overall costs. This net seminar series brings together industry experts and leading-edge products so you can learn about:
- Lowering costs using Cyclone® II FPGAs and HardCopy® II structured ASICs
- Design flows including MATLAB/Simulink and DSP Builder/SOPC Builder
- Video processing solutions including scaler, deinterlacer, and H.264 Video Compression
- Wireless processing including Digital IF solutions
- Video surveillance and WiMAX system implementation with FPGAs
Who should attend:
- FPGA and ASIC Hardware Developers
- DSP System Architects
- Embedded and DSP Software Engineers
- Engineering or Technical Managers
Net Seminar Drawing
Participants who attend any of the three net seminars in this 2006 series (on November 1st, 2nd, or 9th) can enter the drawing for a chance to win one of three RCA Lyra Audio/Video Jukebox Media Players built with Altera® devices.
Participants who attend all three Code:DSP net seminars in this 2006 series (on November 1st, 2nd, and 9th), and enter each of the three net seminar drawings, are automatically entered into the grand prize drawing for a chance to win an Epson P2000 Multimedia Storage Viewer built with Altera devices.
Official Rules
Part 1: Video Processing Tutorial with FPGAs
Original Broadcast Date: Wednesday, November 1, 2006
Time: 11:00 AM Pacific Time
This net seminar focuses on:
- Walk through SD to HD upconversion design example, including deinterlacer,
scaler, and format conversion
- Designing video processing systems with Model-Based Design
- System integration with SOPC Builder
Presenter: Amnon Gai, The MathWorks
Presenter: Dominic Nancekievill, Altera
Part 2: IF Modem Design
Original Broadcast Date: Thursday, November 2, 2006
Time: 11:00 AM Pacific Time
This net seminar focuses on:
- Designing digital downconverter and upconverter functions in FPGAs
- Using off-the-shelf building blocks and Model-Based Design
- WiMAX and 3GPP system design examples
Presenter: Amnon Gai, The MathWorks
Presenter: Deepak Boppana, Altera
Part 3: Multi-Channel H.264 Encoding Solution for Surveillance Applications
Original Broadcast Date: Thursday, November 9, 2006
Time: 11:00 AM Pacific Time
This net seminar focuses on:
- Trends in video surveillance, including trade-offs in video compression techniques
- Comparisons of implementation approaches, including processors, ASSPs, and logic
- Scaleable FPGA-based architecture supporting up to 16 H.264 encoding channels
Presenter: Martyn Riley, 4i2i
Presenter Bios
More information is available on each of the four presenters.
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