Unleashing the Full Potential of High-End System Designs With Stratix III 65-nm FPGAs
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On-Demand and Available Now!
Featured Technology: Stratix® III FPGAs
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| Overview of Webcasts |
| Title |
Description |
Register |
| Overview of Altera's 65-nm Stratix III FPGAs |
15-minute webcast content overview |
Webcast Available Now!
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| Using Stratix III FPGAs to Achieve Higher Performance Systems with Lower Power |
60-minute webcast content overview |
Webcast Available Now!
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Webcast Overview of Altera's 65-nm Stratix III FPGAs
Overview
This 15-minute webcast, targeted for product and engineering management, discusses how Altera’s Stratix III 65-nm high-end FPGAs meet your business and technical requirements.
Jordan Plofsky, Altera’s Senior Vice President of Marketing, explains Altera’s corporate philosophy for delivering programmable logic to meet customer’s needs.
Brad Howe, Altera’s Vice President of IC Design Engineering, follows with an overview of the Stratix III technology innovations that deliver high performance and high density combined with low power consumption, and how the sophisticated Quartus® II development tools make it easy to deliver productivity.
From this webcast, you’ll learn more about:
- Altera’s methodology for delivering programmable logic solutions to meet the next-generation business and technical requirements of industry leading customers around the world
- Technology innovations, including Programmable Power Technology, higher performance and fast interconnects
- The risk-free path from Stratix FPGAs to HardCopy® ASICs
- Quartus II development tools to improve productivity
Who should attend:
- System Architects
- Engineering and Technical Managers
- Engineering Executives
Presenters
Jordan Plofsky
Senior Vice President, Marketing
Jordan Plofsky is Senior Vice President of Altera’s marketing organization, consisting of product planning, product marketing, corporate marketing, technical services and the application business groups. Before joining Altera, Mr. Plofsky spent four and a half years at LSI Logic, most recently as Executive Vice President of the Enterprise Infrastructure Group. With more than 20 years of semiconductor experience, including stints at Analog Devices and Harris Corporation, he holds a BSEE from the University of Illinois, Urbana-Champaign.
Bradley Howe
Vice President, IC Design
Bradley Howe joined Altera in 2002 and serves as Vice President of IC Design, responsible for the development of Altera's silicon products. With 20 years of industry experience, Mr. Howe has held a number of senior engineering and managerial positions that include Vice President of Engineering at C-Cube Microsystems, Clearwater Networks, and SandCraft. He holds a BS and an MS in Computer and Electrical Engineering from Boston University.
Using Stratix III FPGAs to Achieve Higher Performance Systems with Lower Power Webcast
Overview
Not all logic paths are created equal, so why do you need to supply the same currents to the slow paths as you do the fast ones?
Found first in Altera’s Stratix III 65-nm FPGAs, Programmable Power Technology delivers maximum power when needed to critical paths in your design and low power everywhere else. This revolutionary logic array block (LAB)-based feature provides an incredible 50 percent power savings and 25 percent performance improvement over the previous generation FPGAs.
Programmable Power Technology is one of the many innovative features built into Altera’s Stratix III FPGAs that were developed in collaboration with industry leading customers around the world. Learn how these features, along with performance optimizing Quartus II development tools and EDA synthesis support, supply complete solutions and enable you to design your next-generation high-end system with confidence.
From this webcast, learn more about Stratix III FPGAs:
- Logic-rich, digital signal processing (DSP)-rich and memory-rich, and transceiver-based variants
- Customer recommended features and benefits for next-generation system designs
- Adaptive logic module (ALM) architecture
- Development tools and methodology
Who should attend:
- System Architects
- Embedded System Design Engineers
- FPGA Developers
- Engineering and Technical Managers
Presenter
Vaughn Betz
Director, Software Engineering
Vaughn Betz is a Director of Engineering at Altera. He is one of the architects of the Stratix and Cyclone® FPGA families, the Quartus II placement and routing engine, and the Quartus II power analysis and optimization features. Dr. Betz has authored the book Architecture and CAD for Deep-Submicron FPGAs and numerous technical papers. He has over thirty issued and pending patents.
Prior to joining Altera, Dr. Betz was a co-founder and Vice President of Engineering at Right Track CAD. He holds a Bachelor of Sciences degree from The University of Manitoba, a Master of Sciences degree from The University of Illinois, and a PhD from the University of Toronto, all of which are in electrical engineering. The Versatile Place and Route CAD system he developed for his PhD thesis remains the most widely used academic placement, routing, and architecture exploration system for FPGAs.
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