| Table 1. Military & Aerospace Resources |
| Resource |
Description |
| Industrial Temperature Device Support |
Altera's industrial-temperature grade devices |
| Anti-Tampering with High-Performance Stratix II and Stratix II GX FPGAs |
Altera's anti-tampering solution for military applications |
| Cyclic Redundancy Check (CRC) |
Automatic CRC in Stratix® II FPGAs |
| AN357: Error Detection Using CRC in Altera FPGA Devices (PDF) |
For Cyclone™ and Stratix series devices |
| Single Event Upset (SEU) |
Information about SEU |
| Reliability Report |
Altera® Quarterly Reliability Report |
| Literature |
Supporting documentation from Altera |
| Articles of Interest |
| Using Hardware Acceleration Units in Software Defined Radio (SDR) Modem Functions, January 2005 |
COTS Journal News Article |
| FPGA use in software-defined radios, August 23, 2004 |
EE Times News Article |
| Software-Defined Radio Tunes In, March 3, 2005 |
EDN News Article |
| FPGAs Help Software-Defined Radios Adapt, October 2004 |
Wireless Systems Design News Article |
| Conference Papers |
| Rapid FPGA Modem Design Techniques for SDRs Using Altera DSP Builder (PDF) |
Altera documentation from GSPx 2004 |
| Rapid SDR Waveform Development in FPGAs Using DSP Builder (PDF) |
Altera documentation from SDR Forum 2004 |
Reconfigurable Antenna Processing With Matrix Decomposition
Using FPGA-Based Application-Specific Integrated Processors (PDF) |
Altera documentation from SDR Forum 2004 |
Reconfigurable Radio With FPGA-Based Application-Specific
Processors (PDF) |
Altera documentation from SDR Forum 2004 |
| Wideband Modem Design Using FPGAs (PDF) |
Altera documentation from SDR Forum 2004 |
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