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Semiconductor Automated Test Equipment

主页 > 最终市场 > 测试和测量 > ATE

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/products/devices/stratix2/st2-index.jspSemiconductor automated test equipment (ATE) consists of various instruments or cards used for testing memory, digital, mixed signal and system-on-chip (SOC) components, both at the wafer and packaged stages. Driven by the demand in the consumer, computing, and communication markets, these test systems continue to evolve.  To keep pace with innovation in the semiconductor industry, today’s ATE tester products must provide more functionality at higher speeds than ever before.

Programmable logic plays an important role in the development of ATE tester products by providing flexibility and scalability. Functions such as timing accuracy, memory control, digital signal processing (DSP) analysis, high-speed I/O capability, and jitter compliance are all served by programmable logic. Figure 1 shows a typical instrument card in an ATE system. With the increasing complexity of ATE testers, more intellectual property (IP) continues to be integrated within the programmable logic.

Altera offers a variety of IP cores that can be utilized in ATE test equipment. Memory interfaces such as DDR2 and RLDRAM II, or high-speed bus interfaces such as PCI, PCI Express, SFI, and SerialLite (a lightweight, high-bandwidth, point-to-point data protocol) can be downloaded from the Altera® IP MegaStoreTM website.

Figure 1. Typical Automated Test Equipment Test Station

Figure 1. Typical Automated Test Equipment Test Station
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Altera Solutions

The feature-rich architecture of Altera's Stratix® II, Stratix, Stratix GX, Stratix II GX, Cyclone™ II, Cyclone, and HardCopy® families provides an excellent solution for ATE tester equipment production. These device families give system designers flexibility, performance, integration, and design resources that are not available in any other device solution. These silicon products, combined with Altera’s extensive portfolio of IP cores, provide designers with industry-leading solutions for the development of next-generation ATE test platforms.

Stratix II and Stratix devices use a high-performance architecture that accelerates block-based designs for maximum system performance. Stratix II and Stratix devices include high-performance DSP blocks, up to 10-Mbits of embedded TriMatrix™ memory, up to 180,000 logic elements (LEs), and flexible I/O standards.

Built on the award-winning Stratix architecture, Stratix GX devices include the TriMatrix memory and LE resources needed for input and output pin processing functions, such as signal synchronization and timing analysis. The Stratix II GX device family includes up to 20 full-duplex transceiver channels supporting up to 6.5 Gbps with the signal integrity required for serial protocols such as PCI Express 1.1 and 2.0.

Altera offers variety of IP cores that can be utilized in tester equipment. Chip-to-chip interfaces and memory interfaces such as DDR2 and RLDRAM II can be downloaded from Altera's IP MegaStore website.

The Cyclone FPGA series of  high-density, low-cost devices are a precise fit for applications that need a lower price per pin. Cyclone devices can be used in conjunction with Altera IP cores, such as the Nios® II embedded processor to implement control functions that significantly shorten design time. This embedded IP can shorten development cycles, lower costs and yield faster time-to-market. The integration of various peripherals into a single Cyclone series device reduces the number of discrete components on boards, along with the related design costs and time, leading to significant cost savings. With a highly efficient device architecture, Cyclone series devices meet the performance and integration needs of ATE test products.

Related Links

Table 1. Intellectual Property, Development Kits & Reference Designs
Digital Signal Processing Embedded Processors
  • Filtering
  • Transforms
  • Correlation
  • Arithmetic
  • Signal Generation
  • Nios II
    • Cores
    • Benefits
    • Development Tools
    • Development Kits
    • Customer Successes
    • Literature
  • Nios
  • 32/16-Bit CPUs
  • Literature
Interfaces & Peripherals Communications
  • Peripherals
  • PCI
  • PCI Express
  • Memory Controllers
  • PCMCIA
  • Ethernet
  • I2C
  • PowerPC Bus
  • Hyper Transport
  • RapidIOTM
  • SerialLite
  • Additional Functions
  • Cell/Packet
  • Encoding/Decoding
  • HDLC
  • Bluetooth
  • Additional Functions
  • Consortiums
  • Literature

Additional Solutions

  • Design Software
  • Training
  • Design Services
  • Altera Megafunction Partner Program (AMPPSM)

Related Links

  • Stratix II Devices
  • Stratix Devices
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