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Voice over Internet Protocol (VoIP)

A voice-over-Internet-protocol (VoIP) system captures, packetizes, and transports telephone conversations over a network, such as the Internet, which was originally designed to transport computer-generated data. This new approach to transporting voice traffic solves long-term cost issues for organizations that use existing voice-traffic-transport systems, called circuit-switched networks. By implementing VoIP and transporting voice traffic over the Internet, circuit-switched networks and their associated maintenance costs are replaced by a less expensive solution.

There is more information on VoIP system implementation in AN 128: Implementing Voice Over Internet Protocol (PDF).

System Overview with Altera Solutions

VoIP Network System

The VoIP gateway network system highlights the features in Altera’s advanced FPGA devices and IP cores that can provide implementation-level benefits to VoIP developers. The VoIP gateway network system consists of a shelf, which contains three bus lines and two types of cards. Figure 1 shows an overview of a VoIP gateway network system.

Figure 1. VoIP Network System Overview

VoIP Network System Overview

A detailed description of the VoIP network system is available on the VoIP Network System page.

POTS Card

The POTS card is similar to other standard cards used in telephone networking systems today. Figure 2 illustrates the role of the cores and Altera® FPGAs within the POTS card. The orange blocks represent Altera programmable logic device (PLD) solutions.

Figure 2. POTS Card Functional Diagram
Click on the orange blocks in the diagram for more information.

POTS Card Functional Diagram CAM Tone Generation Function GainGen Function Processor Function Tone Detection Function Ethernet Function TDM Switch Function SDRAM

The POTS card's primary purpose is to route calls to and from its attached telephones. It does not perform any packetization. The subscriber line interface circuit (SLIC) and the standard coder/decoder convert the voice signal to digital data and compress the pulse-code modulation (PCM) signal.

Digital Access Card (DAC)

The digital access card (DAC), shown in Figure 3, prepares data for travel over the Internet, unpacks data received from the Internet via T1 lines, and converts it back to the voice format used by the shelf. In addition to the Ethernet control and time-division multiplexed (TDM) switch buses, the DAC also uses an Ethernet packet bus to route packetized voice information between the DACs on the shelf. The orange blocks represent Altera PLD solutions.

Figure 3. DAC Card Block Diagram
Click on the orange blocks in the diagram for more information.

DAC Card Block Diagram T1 Framer Function T1 Framer Function Processor Function (DAC) HDLC Function HDLC Function TDSM Switch Function Ethernet Function Ethernet Function SDRAM Controller CAM

The DAC card can support up to four T1 lines. The DAC card can also access all three buses in the shelf: the TDM switch bus, the control bus (Ethernet-based) and the packet bus (Ethernet-based).

The T1 line interface unit (LIU) is an off-chip, analog device that connects the Altera FPGA devices to the packet network. In this example, the protocol for the packet network is frame relay. When the Altera FPGA device receives the synchronous signal, the packets are streamed through the T1 framer function for bit detection.

Altera & AMPP Cores

The following cores are available on this web site:

Altera Advantages

Using Altera devices and cores for your VoIP network system offers the following advantages:

Flexibility

VoIP network systems need to be flexible; for this reason, ASICs are not a viable platform. Altera's PLD solution provides the flexibility to implement new proprietary features and perform remote in-field upgrades.

Reconfigurability

A fixed solution requires a separate board for each network to accommodate the packet protocols specific to each system. Using programmable logic for a VoIP system allows the designer to replace the high-level data link controller (HDLC) function with other network layer interface functions.

For example, the same cards could be used in the same shelf by replacing the HDLC function with an asynchronous transfer mode (ATM) adaptation layer segmentation and reassembly (SAR) function to use the same board to connect to an ATM network. This approach not only cuts costs in board development and prototyping but also eliminates the debugging problems associated with a multiple-board solution.

Time-to-Market

When any new technology is seeking to enter the market, time-to-market is particularly important. Using Altera programmable logic devices and cores cuts down that vital time, since designers no longer have to wait out the turnaround times of ASIC development.

Logic & Processor Solution

Data path functions in a VoIP system require a fast logic implementation. At the same time, control functions need to be implemented in software. The Altera Excalibur embedded processor solutions allow control functions and complex algorithms to be implemented in software, and speed-critical operations to be done in logic, all on a single leading-edge PLD.

Cost-Reduction Path

System designers who implement telecommunications applications using Altera high-density devices need a low-risk cost-reduction path for high-volume production. To achieve this cost reduction, designers can migrate their designs from a PLD to a HardCopy™ device. HardCopy devices offer a conversion process  that supports the high-density FPGA devices. For example, time-sensitive telecommunications applications can be prototyped and initially produced using Stratix II devices, and when the design is ready for high-volume production, system designers can reduce overall costs by migrating the design to HardCopy devices.

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