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资料:应用手册

下载最新版Adobe Acrobat Reader
Title Doc Version Release Date File Size Document Part Number
Application Notes
AN 532: An SOPC Builder PCI Express Design with GUI Interface New
     Design Files for AN 532 (5 MB)
1.0Jun 2008285 KBAN-532-1.0
AN 531: Reducing Power with Hardware Accelerators New
     Design Files for AN 531 (1 MB)
1.0May 2008151 KBAN-531-1.0
AN 530: Optimizing Impedence Discontinuity Caused by Surface Mount Pads for High-Speed Channel Designs New 1.0May 2008208 KBAN-530-1.0
AN 529: Via Optimization Techniques for High-Speed Channel Designs New 1.0May 2008690 KBAN-529-1.0
AN 528: PCB Dielectric Material Selection and Fiber Weave Effect on High-Speed Channel Routing New 1.0May 20081 MBAN-528-1.0
AN527: Implementing an LCD Controller New 1.0May 2008344 KBAN-527-1.0
AN523: Cyclone III Configuration Interface Guidelines with EPCS Devices New 1.0Jun 2008963 KBAN-523-1.0
AN 521: Cyclone III Active Parallel Remote System Upgrade Reference Design New
     AN521 Design Examples (1 MB)
1.0Jun 20081 MBAN-521-1.0
AN 520: DDR3 SDRAM Memory Interface Termination and Layout Guidelines New 1.0Jun 2008918 KBAN-520-1.0
AN 516: 10-Gbps Ethernet Reference Design New 1.0Jun 2008896 KBAN-516-1.0
AN 514: Power Optimization in Stratix IV FPGAs New 1.0May 2008221 KBAN-514-1.0
AN 479: Design Guidelines for Implementing LVDS Interfaces in Cyclone Series Devices New 1.0Jun 2008422 KBAN-479-1.0
AN 469: Stratix III Design Guidelines Updated 1.1May 2008628 KBAN-469-1.1
AN 466: Cyclone III Design Guidelines Updated 1.1Jul 20081 MBAN-466-1.1
AN 462: Implementing Multiple Memory Interfaces Using the ALTMEMPHY Megafunction Updated
     Example Design for AN 462: top.qar (2 MB)
1.2May 2008888 KBAN-462-1.2
AN 446: Debugging Nios II Systems with the SignalTap II Embedded Logic Analyzer Updated
     signal_tap_test software file (4 KB)
1.2Jun 2008257 KBAN-446-1.2
AN 445: Design Guidelines for Implementing DDR and DDR2 SDRAM Interfaces in Cyclone III Devices Updated
     AN 445 Design Example (1 MB)
2.1May 20082 MBAN-445-2.1
AN 418: SRunner: An Embedded Solution for Serial Configuration Device Programming Updated
     Source Code (254 KB)
1.1Jun 2008288 KBAN-418-1.1
AN 408: DDR2 Memory Interface Termination, Drive Strength, Loading, and Design Layout Guidelines Updated
     Simulation Example (3 KB)
     SIII_DDR2DIMM_RDWR.ffs (11 KB)
     SIII_DDR2DIMM_RDWR.pjh (1 KB)
2.0Jul 20084 MBAN-408-2.0
AN 386: Using the Parallel Flash Loader with the Quartus II Software Updated
     Flash Memory (873 bytes)
     Nios Design (567 KB)
4.1May 20081 MBAN-386-4.1
AN 340: Altera Software Licensing Updated 2.0May 20082 MBAN-340-2.0
AN 326: Interfacing QDRII+ & QDRII with Stratix II, Stratix II GX, Stratix, & Stratix GX Devices Updated 5.1May 20082 MBAN-326-5.1
AN 311: ASIC-to-FPGA Design Methodology and Guidelines Updated 3.0Jun 2008386 KBAN-311-3.0
AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Stratix III Devices1.0May 20081 MBAN-518-1.0
AN 517: Using High-Performance DDR, DDR2, DDR3 SDRAM with SOPC Builder
     AN 517 Design Files (2 MB)
1.0Apr 20081 MBAN-517-1.0
AN 513: RapidIO Interoperability With TI 6482 DSP Reference Design1.1Jan 20082 MBAN-513-1.1
AN 512: Using the Design Security Feature in Stratix III Devices1.0Apr 20081 MBAN-512-1.0
AN 511: Polyphase Modulation Using a FPGA for High-Speed Applications1.0Feb 2008279 KBAN-511-1.0
AN 509: Multiplexing SDIO Devices Using MAX II CPLDs
     AN 509 Design Example (721 KB)
1.0Dec 2007198 KBAN-509-1.0
AN 508: Cyclone III Simultaneous Switching Noise (SSN) Design Guidelines1.0Dec 2007379 KBAN-508-1.0
AN 507: Implementing PLL Reconfiguration in Cyclone III Devices
     Design Example 1: an507_de1_display.zip (204 KB)
     Design Example 2: an507_de2_dynphase.zip (84 KB)
1.0Jan 2008739 KBAN-507-1.0
AN 506: QR Matrix Decomposition2.0Mar 2008371 KBAN-506-2.0
AN 504: DSP System Design in Stratix III Devices
     Design Example 1: Parallel FIR (79 KB)
     Design Example 2: Multi-Channel FIR (20 KB)
     Design Example 3: MAC_FIR (vhdl) (21 KB)
     Design Example 4: Large Mult_Add (11 KB)
1.0Feb 20081 MBAN-504-1.0
AN 503: Implementing OFDM Modulation for Wireless Communications1.0Jan 2008268 KBAN-503-1.0
AN 502: Implementing an SMBus Controller in MAX II CPLDs
     AN 502 Design Example (2 MB)
1.0Dec 2007129 KBAN-502-1.0
AN 501: Pulse Width Modulation Using MAX II CPLDs
     AN 501 Design Example (279 KB)
1.0Dec 2007104 KBAN-501-1.0
AN 500: NAND Flash Memory Interface with MAX II CPLDs
     AN 500 Design Example (187 KB)
1.0Dec 2007137 KBAN-500-1.0
AN 499: Mobile SDRAM Interface Using MAX II CPLDs
     AN 499 Design Example (450 KB)
1.0Dec 2007109 KBAN-499-1.0
AN 498: LED Blink Using Auto Stop and Auto Start in MAX II CPLDs
     AN 498 Design Example (168 KB)
1.0Dec 2007104 KBAN-498-1.0
AN 497: LCD Controller Using MAX II CPLDs
     AN 497 Design Example (2 MB)
1.0Dec 2007133 KBAN-497-1.0
AN 496: Using the Internal Oscillator in MAX II CPLDs
     AN 496 Design Example (230 KB)
1.0Dec 2007362 KBAN-496-1.0
AN 495: IDE/ATA Controller Using MAX II CPLDs
     AN 495 Design Example (418 KB)
1.0Dec 2007155 KBAN-495-1.0
AN 494: GPIO Pin Expansion Using I2C Bus Interface in MAX II CPLDs
     AN 494 Design Example (273 KB)
1.0Dec 2007193 KBAN-494-1.0
AN 493: I2C Battery Gauge Interface Using MAX II CPLDs
     AN 493 Design Example (465 KB)
1.0Dec 2007171 KBAN-493-1.0
AN 492: CF+ Interface Using MAX II CPLDs
     AN 492 Design Example (346 KB)
1.0Dec 2007145 KBAN-492-1.0
AN 491: Auto Start Using MAX II CPLDs
     AN 491 Design Example (245 KB)
1.0Dec 2007119 KBAN-491-1.0
AN 490: MAX II CPLDs as Voltage Level Shifters
     AN 490 Design Example (147 KB)
1.0Dec 2007323 KBAN-490-1.0
AN 489: Using the UFM in MAX II Devices
     AN 489 Design Example (551 KB)
1.0Dec 2007161 KBAN-489-1.0
AN 488: Stepper Motor Controller Using MAX II CPLDs
     AN 488 Design Example (350 KB)
1.0Dec 2007100 KBAN-488-1.0
AN 487: SPI to I2S Using MAX II CPLDs
     AN 487 Desgin Example (589 KB)
1.0Dec 2007138 KBAN-487-1.0
AN 486: SPI to I2C Using MAX II CPLDs
     AN 486 Design Example (385 KB)
1.0Dec 2007144 KBAN-486-1.0
AN 485: Serial Peripheral Interface Master in MAX II CPLDs
     AN 485 Design Example (305 KB)
1.0Dec 2007117 KBAN-485-1.0
AN 484: SMBus for GPIO Pin Expansion in MAX II CPLDs
     AN 484 Design Example (2 MB)
1.0Dec 2007120 KBAN-484-1.0
AN 483: Triple Speed Ethernet Data Path Reference Design 1.0Jan 20082 MBAN-483-1.0
AN 480: 1536-Point FFT for 3GPP Long Term Evolution1.0Oct 2007154 KBAN-480-1.0
AN 478: Using FPGA-Based Parallel Flash Loader with the Quartus II Software1.0Nov 2007861 KBAN-478-1.0
AN477: Designing RGMII Interface with FPGA and HardCopy Devices1.0Nov 2007261 KBAN-477-1.0
AN 476: Impact of I/O Settings on Signal Integrity in Stratix III Devices1.0Oct 2007391 KBAN-476-1.0
AN 475: Crest Factor Reduction for OFDMA Systems1.0Dec 2007362 KBAN-475-1.0
AN 474: Implementing Stratix III Programmable I/O Delay Settings in the Quartus II Software1.2Mar 2008365 KBAN-474-1.2
AN 473: Using DCFIFO for Data Transfer between Asynchronous Clock Domains
     AN473_Design_Example (60 KB)
1.0Dec 20071 MBAN-473-1.0
AN 472: Stratix II GX SSN Design Guidelines1.0Aug 2007666 KBAN-472-1.0
AN 470: Best Practices for Incremental Compilation Partitions and Floorplan Assignments1.0Dec 20071 MBAN-470-1.0
AN 465: Implementing OCT Calibration in Stratix III Devices
     Design Example 1 (200 KB)
     Design Example 2 (74 KB)
     Design Example 3 (211 KB)
     Stratix III OCT Power Up Example (46 KB)
1.0Nov 2007623 KBAN-465-1.0
AN 464: DFT/IDFT Reference design1.0Jun 2007187 KBAN-464
AN 463: Using ALTMEMPHY Megafunction with HardCopy II Structured ASICs1.0Jul 2007915 KBAN-463-1.0
AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III Devices1.0Jun 2007834 KBAN-461-1.0
AN 459: Guidelines for Developing a Nios II HAL Device Driver
     bit_bang_uart.c file (5 KB)
1.0Aug 20073 MBAN-459-1.0
AN458: Alternative Nios II Boot Methods
     AN458 design example files (30 KB)
     Default boot loader sources (17 KB)
1.0Nov 2007336 KBAN-458-1.0
AN 457: Integrating Uplink Desubchannelization and Ranging Modules for WiMAX1.0Feb 2007166 KBAN-457-1.0
AN 456: PCI Express High Performance Reference Design
     AN 456 design files (13 MB)
1.0May 2007613 KBAN-456-1.0
AN 455: Understanding CIC Compensation Filters1.0Apr 2007268 KBAN-455-1.0
AN 454: Implementing PLL Reconfiguration in Stratix III Devices
     Design Example 1 (364 KB)
     Design Example 2 (211 KB)
1.1Oct 2007543 KBAN-454-1.1
AN 453: HardCopy II Fitting Techniques1.0Jun 20071 MBAN-453-1.0
AN 452: An OFDM Kernel for WiMAX
     WiMAX OFDMA Reference Design Web Page (8 KB)
1.0Feb 2007319 KBAN-452-1.0
AN 451: Downlink Subchannelization for WiMAX1.0Feb 2007319 KBAN-451-1.0
AN 450: Uplink Desubchannelization for WiMAX1.0Feb 2007319 KBAN-450-1.0
AN 449: External Memory Interface Design Guidelines for Stratix II, Stratix II GX, and Arria GX Devices1.2Sep 2007284 KBAN-449-1.2
AN 448: Stratix III Power Management Design Guide1.3May 2007201 KBAN-448-1.3
AN 447: Interfacing Cyclone III Devices with 3.3/3.0/2.5-V LVTTL & LVCMOS I/O Systems1.1Apr 2008349 KBAN-447-1.1
AN 444: Dual DIMM DDR2 SDRAM Memory Interface Design Guidelines1.0Feb 20077 MBAN-444-1.0
AN 443: External PHY Support in PCI Express MegaCore Functions1.0May 2007435 KBAN-443-1.0
AN 442: Tool Flow for Design of Digital IF for Wireless Systems1.0May 20071 MBAN-442
AN 440: Accelerating Nios II Networking Applications
     Accelerating Nios II Networking Applications Design (3 MB)
1.0May 2007193 KBAN-440-1.0
AN 439: Constellation Mapper and Demapper for WiMAX1.1May 2007250 KBAN-439-1.1
AN 438: Constraining and Analyzing Timing for External Memory Interfaces in Stratix III and Cyclone III Devices3.0Oct 2007306 KBAN-438-3.0
AN 437: Power Optimization in Stratix III FPGAs2.0Aug 2007219 KBAN-437-2.0
AN 436: Design Guidelines for Implementing DDR3 SDRAM Interfaces in Stratix III Devices2.0Dec 20071 MBAN-436-2.0
AN 435: Design Guidelines for Implementing DDR and DDR2 SDRAM Interfaces in Stratix III Devices1.0Feb 20071 MBAN-435-1.0
AN 434: Channel Estimation & Equalization for Mobile WiMAX Basestations
     Channel Estimation & Equalization Reference Design (8 KB)
1.1May 2007748 KBAN-434-1.1
AN 433: Constraining and Analyzing Source-Synchronous Interfaces2.0Dec 20071 MBAN-433-2.0
AN 432: Using Different PLL Settings Between Stratix II and HardCopy II Devices1.1Dec 2007168 KBAN-432-1.1
AN 431: PCI Express-to-DDR2 SDRAM Reference Design1.0Sep 20062 MBAN-431-1.0
AN 430: WiMAX OFDMA Ranging1.0Aug 2006769 KBAN-430-1.0
AN 429: Remote Configuration Over Ethernet with the Nios II Processor
     Application Note 429 Design Files (106 KB)
1.1Nov 2007137 KBAN-429-1.1
AN 428: MAX II CPLD Design Guidelines1.1Dec 2007425 KBAN-428
AN 427: Video and Image Processing Up Conversion Example Design
     Video Processing Reference Design web page (12 KB)
4.0Oct 20072 MBAN-427-4.0
AN 426: Using MAX II CPLDs as Analog Keyboard Encoders1.0Jul 2006308 KBAN-426-1.0
AN 425: Using Command-Line Jam STAPL Solution for Device Programming2.0Nov 2007496 KBAN-425-2.0
AN 424: I/O Simulations Using HSPICE1.0Jun 20062 MBAN-424-1.0
AN 423: Configuring the MicroBlaster Passive Serial Software Driver
     Source Code (150 KB)
1.0Jun 2006150 KBAN-423-1.0
AN 422: Power Management in Portable Systems Using MAX II CPLDs1.0Jul 2006265 KBAN-422-1.0
AN 421: Accelerating WiMAX DUC & DDC System Designs
     WiMAX DUC & DDC Reference Design Web Page (9 KB)
2.2May 2007758 KBAN-421-2.2
AN 417: Accelerating Functions with the C2H Compiler: Scatter-Gather DMA with Checksum
     Scatter-Gather DMA Design Files (6 KB)
1.1Jul 2006424 KBAN-417-1.1
AN 415: DDR and DDR2 SDRAM ECC Reference Design
     ECC Reference Design Files (242 bytes)
1.0Jun 2006291 KBAN-415
AN 414: The JRunner Software Driver: An Embedded Solution for PLD JTAG Configuration
     Source Code (221 KB)
1.0May 2006145 KBAN-414-1.0
AN 413: Using Legacy Integrated Static Data Path and Controller Megafunction with HardCopy II Structured ASICs2.1Jul 2007227 KBAN-413-2.1
AN 412: A Scalable OFDMA Engine for WiMAX
     WiMAX OFDMA Reference Design Web Page
2.1May 2007359 KBAN-412-2.1
AN 411: Understanding PLL Timing for Stratix II Devices
     Design Example 1 (279 KB)
     Design Example 2 (233 KB)
1.0Mar 20061 MBAN-411-1.0
AN 410: MAX II ISP Update with I/O Control & Register Data Retention
     ISP SRAM Download Design Files (11 KB)
1.0Mar 2006126 KBAN-410-1.0
AN 409: Design Example Using the altlvds Megafunction & the External PLL Option in Stratix II Devices
     Design Example (7 MB)
1.0Mar 2006244 KBAN-409-1.0
AN 407: Automotive Audio Reference Design1.0Apr 20062 MBAN-407-1.0
AN 404: FFT/IFFT Block Floating Point Scaling1.0Oct 2005110 KBAN-404-1.0
AN 403: Avalon Blocks in DSP Builder1.0Oct 2005483 KBAN-403-1.0
AN 402: Black-Boxing in DSP Builder1.0Oct 2005242 KBAN-402-1.0
AN 400: SMBus Interface for the User Flash Memory in MAX II Devices
     SMBus (Read/Write/Erase) Design Files (8 KB)
     SMBus (Read Only) Design Files (8 KB)
1.0Sep 20051 MBAN-400-1.0
AN 398: Using DDR/DDR2 SDRAM With SOPC Builder1.1Aug 2006775 KBAN-398-1.1
AN 397: Interfacing to External Processors
     Design Files (13 KB)
1.0Aug 2005363 KBAN-397-1.0
AN 396: Crest Factor Reduction1.0Jun 20071 MBAN-396
AN 395: Stratix II Professional FFT Co-Processor Reference Design1.0Aug 2005446 KBAN-395-1.0
AN 394: Using SOPC Builder & DSP Builder Tool Flow1.0Aug 2005910 KBAN-394-1.0
AN 393: Stratix II Professional Filtering Lab1.0Aug 20051 MBAN-393-1.0
AN 392: Implementing Multiple Legacy DDR/DDR2 SDRAM Controller Interfaces
     three controller example (26 KB)
     two controller example (15 KB)
2.0Jul 2007306 KBAN-392-2.0
AN 391: Profiling Nios II Systems
     AN 391: Performance Checksum Design Files (7 KB)
     AN 391: Profiler Checksum Design Files (4 KB)
1.2Feb 2006784 KBAN-391-1.2
AN 390: PCI-to-DDR2 SDRAM Reference Design1.0Sep 2005261 KBAN-390-1.0
AN 388: High-Performance EMIF Bridge Core1.2Sep 2005435 KBAN-388
AN 387: Upgrading a FIR Compiler v3.1.x Design to v3.2.x1.0May 2005537 KBAN-387-1.0
AN 385: Using Stratix GX Transceivers for PCI Express1.0Jun 20054 MBAN-385-1.0
AN 384: Using Calibrated Series On-Chip Termination in Stratix II Devices
     User-Mode Calibration Reference Design (Quartus II Version 4.2 SP1) (233 KB)
     User-Mode Calibration Reference Design (Quartus II Version 5.0) (233 KB)
1.0Apr 2005116 KBAN-384-1.0
AN 383: Cyclone II DDR2 SDRAM Demonstration1.0Apr 2005175 KBAN-383-1.0
AN 382: Using Stratix GX Transceivers for CPRI1.0May 2005953 KBAN-382-1.0
AN 380: Test DDR or DDR2 SDRAM Interfaces on Hardware Using the Example Driver1.2Jun 2006630 KBAN-380-1.2
AN 379: Active Serial Memory Interface Controller Reference Design
     Design Files (11 KB)
1.0Mar 2005191 KBAN-379-1.0
AN 377: Edge Detection Using SOPC Builder & DSP Builder Tool Flow1.0May 20051 MBAN-377-1.0
AN 376: Cyclone II Filtering Lab1.0May 20051 MBAN-376-1.0
AN 375: Cyclone II FFT Co-Processor Reference Design1.0May 2005566 KBAN-375-1.0
AN 374: Video Over IP Reference Design
     Video Over IP Reference Design Web Page (9 KB)
2.5Jan 2008667 KBAN-374-2.5
AN 373: Avalon Video Input Module1.0Dec 2004154 KBAN-373
AN 372: Avalon LCD Controller1.0Dec 2004159 KBAN-372
AN 371: Automotive Graphics System Reference Design1.0Dec 2004195 KBAN-371
AN 370: Using the Serial FlashLoader With the Quartus II Software3.0Jul 2006792 KBAN-370-3.0
AN 369: AES3/EBU Reference Design
     AES3/EBU Reference Design Web Page (10 KB)
1.1Feb 20051 MBAN-369
AN 367: Implementing PLL Reconfiguration in Stratix II Devices
     Example 1: altpll_reconfig Design with the MIF (244 KB)
     Example 2: altpll_reconfig Design with Write Parameters (249 KB)
     Example 3: altpll_reconfig Design for Phase Shift Stepping (251 KB)
2.0Dec 2005690 KBAN-367-2.0
AN 366: Understanding I/O Output Timing for Altera Devices1.0Jul 2006311 KBAN-366-1.0
AN 364: Edge Detection Reference Design1.0Oct 20041 MBAN-364-1.0
AN 363: FFT Co-Processor Reference Design1.0Oct 20041 MBAN-363-1.0
AN 362: Stratix II Filtering Lab1.0Oct 20041 MBAN-362-1.0
AN 361: Interfacing DDR & DDR2 SDRAM With Cyclone II Devices1.3Jun 2006380 KBAN-361-1.3
AN 360: Updating Simulation Models for the POS-PHY Level 4 MegaCore Function1.1Dec 200463 KBAN-360-1.1
AN 359: POS-PHY Level 4 MegaCore Function Parameter Selection Calculator1.0Jul 2004219 KBAN-359-1.0
AN 358: Thermal Management for FPGAs1.1Feb 2007157 KBAN-358-1.1
AN 357: Error Detection & Recovery Using CRC in Altera FPGA Devices1.3Feb 2007179 KBAN-357-1.3
AN 355: Stratix II Device System Power Considerations1.0Jun 2004274 KBAN-355-1.0
AN 353: Reflow Soldering Guidelines for Lead-Free Packages1.0Jul 200489 KBAN-353-1.0
AN 352: FPGA Peripheral Expansion & FPGA Co-Processing1.0Jul 2004552 KBAN352-1.0
AN 351: Simulating Nios II Embedded Processor Designs1.1Nov 20071 MBAN-351-1.1
AN 350: Upgrading Nios Processor Systems to the Nios II Processor1.1Jul 2006617 KBAN-350-1.1
AN 349: QDR SRAM Controller Reference Design for Stratix & Stratix GX Devices1.0May 2004280 KBAN-349-1.0
AN 348: Interfacing DDR SDRAM with Cyclone Devices1.1Jul 2004441 KBAN-348-1.1
AN 347: Farrow-Based Decimating Sample Rate Converter1.0Mar 2004256 KBAN-347-1.0
AN 346: Using the Nios Development Board Configuration Controller Reference Designs1.1Aug 2006307 KBAN-346-1.1
AN 345: Altera Design Flow for Lattice Semiconductor Users1.1Jan 2005581 KBAN-345-1.1
AN 344: ASI Demonstration2.0Oct 2006145 KBAN-344-2.0
AN 343: OpenCore Evaluation of AMPP Megafunctions1.0Feb 2004294 KBAN-343-1.0
AN 342: Interfacing DDR SDRAM with Stratix & Stratix GX Devices2.0Dec 2005428 KBAN-342-2.0
AN 341: Using the Design Security Feature in Stratix II and Stratix II GX Devices2.1Aug 20071 MBAN-341-2.1
AN 339: Serial Digital Interface Demonstration for Stratix II GX Devices3.3May 2007288 KBAN-339
AN 336: Using External Series and Parallel Termination with Stratix and Stratix GX Devices1.0Nov 20031 MBAN-336-1.0
AN 335: POS-PHY Level 4 MegaCore Function v2.1.0 Wrapper Features1.0Jan 2004282 KBAN-335-1.0
AN 334: ADI Parallel Port SDRAM Controller Reference Design1.3Jun 2005753 KBAN-334-1.3
AN 333: Developing Peripherals for SOPC Builder
     Slave Peripheral Design Files (455 KB)
     Streaming Slave 1C20 Design Files (1 MB)
     Streaming Slave 1S10 Design Files (1 MB)
     Streaming Slave 1S10ES Design Files (1 MB)
     Streaming Slave 1S40 Design Files (1 MB)
1.0Apr 2004267 KBAN-333-1.0
AN 332: Link-Port Reference Design1.3Feb 20051 MBAN-332
AN 330: Connecting Altera 3.3-V PCI devices to a 5-V PCI Bus1.0Feb 2004112 KBAN-330-1.0