资料： SOPC Builder

This page provides links to the SOPC Builder volume of the Quartus^® II Development Software Handbook and other documents related to SOPC Builder. The SOPC Builder volume provides an introduction to all SOPC Builder features, complete usage reference, and tutorials for building custom systems. Click the links below to view and download the entire volume, or any individual section or chapter. For more SOPC Builder support, visit the SOPC Builder Support web page.

Volume 4: SOPC Builder (ver 9.1, Nov 2009, 1 MB)

Section I. SOPC Builder Features (745 KB)

• Chapter 1. Introduction to SOPC Builder (ver 9.1.0, Nov 2009, 176 KB)
• Chapter 2. System Interconnect Fabric for Memory-Mapped Interfaces (ver 9.1.0, Nov 2009, 239 KB)
• Chapter 3. System Interconnect Fabric for Streaming Interfaces (ver 9.1.0, Nov 2009, 121 KB)
• Chapter 4. SOPC Builder Components (ver 9.1.0, Nov 2009, 186 KB)
• Chapter 5. Using SOPC Builder with the Quartus II Software (ver 9.1.0, Nov 2009, 127 KB)
• Chapter 6. Component Editor (ver 9.1.0, Nov 2009, 122 KB)
• Chapter 7. Component Interface Tcl Reference (ver 9.1.0, Nov 2009, 279 KB)
• Chapter 8. Archiving SOPC Builder Projects (ver 9.1.0, Nov 2009, 77 KB)

Section II. Building Systems with SOPC Builder (410 KB)

• Chapter 9. SOPC Builder Memory Subsystem Development Walkthrough (ver 9.1.0, Nov 2009, 327 KB)
• Chapter 10. SOPC Builder Component Development Walkthrough (ver 9.1.0, Nov 2009, 153 KB)
• Altera Avalon Checksum

Section III. Interconnect Components (479 KB)

• Chapter 11. Avalon Memory-Mapped Bridges (ver 9.1.0, Nov 2009, 415 KB)
• Chapter 12. Avalon Streaming Interconnect Components (ver 9.1.0, Nov 2009, 127 KB)

Volume 5: Embedded Peripherals (ver 9.1.1, Feb 2010, 3 MB)

Section I. Off-Chip Interface Peripherals (2 MB)

• Chapter 1. SDRAM Controller Core (ver 9.1.0, Nov 2009, 187 KB)
• Chapter 2. CompactFlash Core (ver 9.1.0, Nov 2009, 80 KB)
• Chapter 3. Common Flash Interface Controller Core (ver 9.1.0, Nov 2009, 108 KB)
• Chapter 4. EPCS Device Controller Core (ver 9.1.0, Nov 2009, 86 KB)
• Chapter 5. JTAG UART Core (ver 9.1.0, Nov 2009, 161 KB)
• Chapter 6. UART Core (ver 9.1.0, Nov 2009, 177 KB)
• Chapter 7. SPI Core (ver 9.1.0, Nov 2009, 144 KB)
• Chapter 8. Optrex 16207 LCD Controller Core (ver 9.0.0, Nov 2009, 73 KB)
• Chapter 9. PIO Core (ver 9.1.0, Nov 2009, 98 KB)
• Chapter 10. Avalon-ST Serial Peripheral Interface Core (ver 9.1.0, Nov 2009, 175 KB)
• Chapter 11. PCI Lite Core (ver 9.1.0, Nov 2009, 269 KB)
• Chapter 12. Cyclone III Remote Update Controller Core (ver 9.1.0, Nov 2009, 113 KB)

Section II. On-Chip Storage Peripherals (2 MB)

• Chapter 13. Avalon-ST Single Clock and Dual Clock FIFO Cores (ver 9.1.0, Nov 2009, 170 KB)
• Chapter 14. On-Chip FIFO Memory Core (ver 9.1.0, Nov 2009, 141 KB)
• Chapter 15. Avalon-ST Multi-Channel Shared Memory FIFO Core (ver 9.1.0, Nov 2009, 167 KB)

Section III. Transport and Communication (775 KB)

• Chapter 16. SPI Slave/JTAG to Avalon Master Bridge Cores (ver 9.1.0, Nov 2009, 191 KB)
• Chapter 17. Avalon Streaming Channel Multiplexer and Demultiplexer Cores (ver 9.1.0, Nov 2009, 92 KB)
• Chapter 18. Avalon-ST Bytes to Packets and Packets to Bytes Converter Cores (ver 9.1.0, Nov 2009, 143 KB)
• Chapter 19. Avalon Packets to Transactions Converter Core (ver 9.1.0, Nov 2009, 110 KB)
• Chapter 20. Avalon-ST Round Robin Scheduler Core (ver 9.1.0, Nov 2009, 106 KB)
• Chapter 21. Avalon-ST Delay Core (ver 9.1.1, Feb 2010, 119 KB)
• Chapter 22. Avalon-ST Splitter Core (ver 9.1.1, Feb 2010, 122 KB)

Section IV. Peripherals (870 KB)

• Chapter 23. Scatter-Gather DMA Controller Core (ver 9.1.0, Nov 2009, 177 KB)
• Chapter 24. DMA Controller Core (ver 9.1.0, Nov 2009, 129 KB)
• Chapter 25. Video Sync Generator and Pixel Converter Cores (ver 9.1.0, Nov 2009, 130 KB)
• Chapter 26. Interval Timer Core (ver 9.1.0, Mar 2009, 144 KB)
• Chapter 27. Vectored Interrupt Controller Core (ver 9.1.0, Nov 2009, 313 KB)
• Chapter 28. Mutex Core (ver 9.1.0, Nov 2009, 77 KB)
• Chapter 29. Mailbox Core (ver 9.1.0, Nov 2009, 83 KB)

Section V. Test and Debug Peripherals (610 KB)

• Chapter 30. Avalon-ST JTAG Interface Core (ver 9.1.0, Nov 2009, 123 KB)
• Chapter 31. System ID Core (ver 9.1.0, Nov 2009, 70 KB)
• Chapter 32. Performance Counter Core (ver 91.0, Nov 2009, 108 KB)
• Chapter 33. Avalon Streaming Test Pattern Generator and Checker Cores (ver 9.1.0, Nov 2009, 236 KB)
• Chapter 34. Avalon Streaming Data Pattern Generator and Checker Cores (ver 9.1.1, Feb 2010, 203 KB)

Section VI. Clock Control Peripherals (334 KB)

• Chapter 35. PLL Cores (ver 9.1.0, Nov 2009, 119 KB)

Embedded Design Handbook (ver 2.7, Mar 2010, 5 MB)

Section I. Introduction (344 KB)

• Chapter 1. First-Time Designer's Guide (ver 2.2, Mar 2010, 344 KB)

Section II. Nios II Software Development (1 MB)

• Chapter 2. Developing Nios II Software (ver 1.3, Dec 2009, 630 KB)
• Chapter 3. Debugging Nios II Designs (ver 1.3, Dec 2009, 480 KB)
• Chapter 4. Nios II Command-Line Tools (ver 2.1, Apr 2009, 152 KB)
• Chapter 5. Optimizing Nios II C2H Compiler Results (ver 1.1, Jun 2008, 468 KB)
• edh_c2h_optimization_design_files.zip

Section III. System Level Design (3 MB)

• Chapter 6. Avalon Memory-Mapped Design Optimizations (ver 1.1, Jun 2008, 332 KB)
• Chapter 7. Memory System Design (ver 1.2, Feb 2010, 307 KB)
• Chapter 8. Hardware Acceleration and Coprocessing (ver 1.1, Jun 2008, 163 KB)
• Chapter 9. Verification and Board Bring-Up (ver 1.2, Nov 2008, 240 KB)
• Chapter 10. Interfacing an External Processor to an Altera FPGA (ver 1.0, Feb 2009, 549 KB)

Related Documentation

User Guides

• Avalon Verification IP Suite User Guide (ver 1.1, Dec 2009, 2 MB)
  (Includes Avalon-MM and Avalon-ST tutorials)
Avalon Verification IP Suite Design Files ( 21 KB)
• System Console User Guide (ver 1.3, Nov 2009, 230 KB)
Design Files for System Console ( 206 KB)
• Nios II Custom Instruction User Guide (ver 1.5, Jun 2008, 701 KB)
Design Files for Nios II Custom Instruction User Guide ( 19 KB)

Application Notes

• AN 532: An SOPC Builder PCI Express Design with GUI Interface (ver 1.0, Jun 2008, 285 KB)
Design Files for AN 532 ( 5 MB)
• AN 531: Reducing Power with Hardware Accelerators (ver 1.0, May 2008, 151 KB)
Design Files for AN 531 ( 1 MB)
• AN 346: Using the Nios II Configuration Controller Reference Designs (ver 1.2, Mar 2009, 793 KB)
• AN458: Alternative Nios II Boot Methods (ver 1.1, Sep 2008, 334 KB)
AN458 design example files ( 37 KB)
• AN 323: Using SignalTap II Embedded Logic Analyzers in SOPC Builder Systems (ver 1.1, Nov 2007, 386 KB)
• AN 398: Using DDR/DDR2 SDRAM With SOPC Builder (ver 1.1, Aug 2006, 775 KB)

White Papers

• Comparing IP Integration Approaches for FPGA Implementation (ver 1.1, Feb 2008, 195 KB)

Selector Guides

• Altera Product Catalog (ver 7.4, Mar 2010, 3 MB)

Functional Specifications

• Avalon Interface Specifications (ver 1.2, Apr 2009, 485 KB)
  (Replaces "Avalon Memory-Mapped Interface Specification" and "Avalon Streaming Interface Specification")

Tutorials

• Nios II Hardware Development Tutorial (ver 3.0, Dec 2009, 743 KB)
Design Files for Nios II Hardware Development Tutorial ( 5 KB)
• Using Nios II Tightly Coupled Memory Tutorial (ver 1.2, Jul 2009, 210 KB)
Design Files for Tightly Coupled Memory Tutorial ( 15 KB)
• Nios II System Architect Design Tutorial (ver 1.0, Jun 2009, 1 MB)
Nios II Architect Design Tutorial Design Files ( 4 MB)

Product Overview

• Industrial Ethernet solutions from Altera (ver 4.1, Jun 2009, 264 KB)
• 1080p video framework from Altera (ver 1.0, Apr 2008, 230 KB)
• Broadcast Solutions Supporting Altera's HD Quality Initiative (HDQI) (ver 2.0, Apr 2008, 2 MB)
• Accelerating applications on coprocessing platforms (ver 1.0, Jul 2007, 104 KB)