资料：Stratix II 器件
Stratix® II 器件由两册组成。 第一册是Stratix II FPGA系列数据手册。第二册包括Stratix II特性的详细信息以及PCB配线指南。要查看全部两册，请点击下方链接。
Get more information on Stratix II Pin-Outs.
Check the Knowledge Database for Known Issues with the Stratix II Handbook.
Volume 1 (ver 4.3, May 2007, 3 MB)
Section I.
Stratix II Device Family Data Sheet (3 MB)
- Chapter 1. Introduction (ver 4.2, May 2007, 132 KB)
- Chapter 2. Stratix II Architecture (ver 4.3, May 2007, 1,011 KB)
- Chapter 3. Configuration & Testing (ver 4.2, May 2007, 165 KB)
- Chapter 4. Hot Socketing & Power-On Reset (ver 3.2, Apr 2006, 102 KB)
- Chapter 5. DC & Switching Characteristics (ver 4.3, May 2007, 2 MB)
- Chapter 6. Reference & Ordering Information (ver 2.1, May 2007, 70 KB)
Volume 2 (ver 4.4, Jan 2008, 5 MB)
Section I.
Clock Management (1 MB)
Section II.
Memory (701 KB)
Section III.
I/O Standards (748 KB)
Section IV.
Digital Signal Processing (DSP) (348 KB)
Section V.
Configuration and Remote System Upgrades (1 MB)
Section VI.
PCB Layout Guidelines (1 MB)
Related Documentation
Data Sheets
User Guides
- External DDR Memory PHY Interface Megafunction User Guide (ALTMEMPHY) (ver 5.0, Jul 2008, 2 MB)
- DDR Timing Wizard User Guide (ver 3.0, Nov 2007, 2 MB)
- Double Data Rate I/O Megafunction User Guide (ALTDDIO_IN, ALTDDIO_OUT, and ALTDDIO_BIDIR) (ver 4.2, Jun 2007, 4 MB)
- Single- and Dual-Clock FIFO Megafunction User Guide (ver 4.0, May 2007, 960 KB)
- PowerPlay Early Power Estimator User Guide for Stratix II, Stratix II GX, and HardCopy II (ver 1.2, Jan 2007, 3 MB)
- DSP Development Kit, Stratix II Professional Edition Getting Started User Guide (ver 1.0, Aug 2005, 967 KB)
- DSP Development Kit, Stratix II Edition Getting Started User Guide (ver 1.1, May 2005, 646 KB)
Manuals
Application Notes
- AN 326: Interfacing QDRII+ & QDRII with Stratix II, Stratix II GX, Stratix, & Stratix GX Devices (ver 5.1, May 2008, 2 MB)
- AN 432: Using Different PLL Settings Between Stratix II and HardCopy II Devices (ver 1.1, Dec 2007, 168 KB)
- AN 357: Error Detection & Recovery Using CRC in Altera FPGA Devices (ver 1.4, Jul 2008, 371 KB)
- AN 341: Using the Design Security Feature in Stratix II and Stratix II GX Devices (ver 2.2, Jul 2008, 881 KB)
- AN 408: DDR2 Memory Interface Termination, Drive Strength, Loading, and Design Layout Guidelines (ver 2.1, Jul 2008, 4 MB)
- AN 462: Implementing Multiple Memory Interfaces Using the ALTMEMPHY Megafunction (ver 1.2, May 2008, 888 KB)
- AN 114: Designing with High-Density BGA Packages for Altera Devices (ver 5.1, Dec 2007, 574 KB)
- AN477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 1.0, Nov 2007, 261 KB)
- AN 328: Interfacing DDR2 SDRAM with Stratix II, Stratix II GX, and Arria GX Devices (ver 4.0, Nov 2007, 3 MB)
- AN 449: External Memory Interface Design Guidelines for Stratix II, Stratix II GX, and Arria GX Devices (ver 1.2, Sep 2007, 284 KB)
- AN 358: Thermal Management for FPGAs (ver 1.1, Feb 2007, 157 KB)
- AN 444: Dual DIMM DDR2 SDRAM Memory Interface Design Guidelines (ver 1.0, Feb 2007, 7 MB)
- AN 366: Understanding I/O Output Timing for Altera Devices (ver 1.0, Jul 2006, 311 KB)
- AN 409: Design Example Using the altlvds Megafunction & the External PLL Option in Stratix II Devices (ver 1.0, Mar 2006, 244 KB)
- AN 411: Understanding PLL Timing for Stratix II Devices (ver 1.0, Mar 2006, 1 MB)
- AN 327: Interfacing DDR SDRAM with Stratix II Devices (ver 3.0, Feb 2006, 1 MB)
- AN 367: Implementing PLL Reconfiguration in Stratix II Devices (ver 2.0, Dec 2005, 690 KB)
- AN 325: Interfacing RLDRAM II with Stratix II, Stratix & Stratix GX Devices (ver 3.1, Nov 2005, 2 MB)
- AN 393: Stratix II Professional Filtering Lab (ver 1.0, Aug 2005, 1 MB)
- AN 394: Using SOPC Builder & DSP Builder Tool Flow (ver 1.0, Aug 2005, 910 KB)
- AN 395: Stratix II Professional FFT Co-Processor Reference Design (ver 1.0, Aug 2005, 446 KB)
- AN 384: Using Calibrated Series On-Chip Termination in Stratix II Devices (ver 1.0, Apr 2005, 116 KB)
- AN 379: Active Serial Memory Interface Controller Reference Design (ver 1.0, Mar 2005, 191 KB)
- AN 360: Updating Simulation Models for the POS-PHY Level 4 MegaCore Function (ver 1.1, Dec 2004, 63 KB)
- AN 306: Implementing Multipliers in FPGA Devices (ver 3.0, Jul 2004, 733 KB)
- AN 355: Stratix II Device System Power Considerations (ver 1.0, Jun 2004, 274 KB)
- AN 315: Guidelines for Designing High-Speed FPGA PCBs (ver 1.1, Feb 2004, 2 MB)
White Papers
- Basic Principles of Signal Integrity (ver 1.3, Dec 2007, 548 KB)
- Implementation of the Smith-Waterman Algorithm on a Reconfigurable Supercomputing Platform (ver 1.0, Sep 2007, 1 MB)
- FPGA Performance Benchmarking Methodology (ver 1.6, Aug 2007, 246 KB)
- SEmulation: Turbocharging the FPGA Development Process (ver 1.0, Mar 2007, 1 MB)
- Stratix II Performance and Logic Efficiency Analysis (ver 2.0, Sep 2006, 1 MB)
- Stratix II vs. Virtex-4 Performance Comparison (ver 2.0, Sep 2006, 505 KB)
- Stratix II DDR2 System Validation Summary (ver 1.0, May 2006, 1 MB)
- Architectural Differences Between Stratix II & Stratix Devices (ver 1.1, Jan 2006, 324 KB)
- Versatile Digital QAM Modulator (ver 1.1, Jan 2006, 586 KB)
- Stratix II vs. Virtex-4 Density Comparison (ver 2.2, Aug 2005, 264 KB)
- Stratix II vs. Virtex-4 Power Comparison & Estimation Accuracy (ver 1.0, Aug 2005, 356 KB)
- Input Signal Edge Rate Guidance (ver 1.0, Jun 2005, 63 KB)
- FPGAs for High-Performance DSP Applications (ver 1.1, May 2005, 119 KB)
- Using Parity to Detect Memory Errors in Stratix Devices (ver 1.2, Feb 2005, 97 KB)
- Stratix II DSP Performance (ver 2.0, Jan 2005, 241 KB)
- Stratix vs. Virtex-II Pro FPGA Performance Analysis (ver 1.1, Nov 2004, 146 KB)
- Benefits of Altera's High-Speed DDR2 SDRAM Memory Interface Solution (ver 1.0, May 2004, 273 KB)
- Implementing a Queue Manager in Traffic Management Systems (ver 1.1, Feb 2004, 125 KB)
- The Need for Dynamic Phase Alignment in High-Speed FPGAs (ver 1.1, Feb 2004, 71 KB)
- Altera Hot-Socketing & Power-Sequencing Advantages (ver 1.2, Feb 2004, 79 KB)
- MorphIO: An I/O Reconfiguration Solution for Altera Devices (ver 1.0, May 2003, 46 KB)
Brochures
Selector Guides
Errata Sheets
- Stratix II FPGA Family Errata Sheet (ver 2.0, Dec 2006, 229 KB)
- DSP Development Kit, Stratix II Edition Errata Sheet v1.1 (ver 1.0, Sep 2005, 97 KB)
- DSP Development Kit, Stratix II Edition Errata Sheet (ver 1.0, Apr 2005, 88 KB)
- High Speed Development Kit, Stratix II Edition Errata Sheet (ver 1.0, Apr 2005, 69 KB)
Technical Briefs
Application Briefs
Product Overview
- Altera Enhanced COTS PLD Initiative (ver 1.1, Jul 2008, 122 KB)
- Altera wireless solutions - 3GPP Long-Term Evolution (ver 1.0, Jan 2008, 68 KB)
- Broadband access solutions from Altera (ver 1.0, Sep 2007, 263 KB)
- Accelerating applications on coprocessing platforms (ver 1.0, Jul 2007, 104 KB)
- Industrial Snakebytes sell sheet (ver 1.0, Apr 2007, 112 KB)
- Complete Memory Interface Design Solutions (ver 1.0, Sep 2006, 149 KB)
- Fit More in Stratix II (ver 1.0, May 2005, 103 KB)
Inserts and Advertorials
|
文档资料
> 
