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标题 版本 发布日期 文件大小 文件序列号
白皮书
采用下一代FPGA支持数字电视发展趋势 1.0 2010年2月 1.76mb WP-01120-1.0-CN
家庭网络的服务质量 1.1 2010年1月 694kb WP-01024-1.1-CN
采用FPGA实现100G光传送网 1.0 2009年10月 1.36mb WP-01115-1.0-CN
使用LED作为亮度级传感器和发射器 2.1 2009年10月 1.41mb WP-01076-2.1-CN
理解FPGA 中的压稳态 1.2 2009年7月 795kb WP-01082-1.2-CN
简化同时多模式RRH设计 1.0 2009年3月 1.36mb WP-01097-1.0-CN
为MSPP线路卡提供NG-SONET/SDH承载以太网解决方案 1.0 2009年4月 342kb WP-01098-1.0-CN
评估40 nm FPGA DSP基准测试 1.0 2009年3月 661kb WP-01102-1.0-CN
军用传感器系统的DSP自动仿真和实现 1.0 2009年3月 569kb WP-01104-1.0-CN
在FPGA中实现图像格式转换 1.1 2009年6月 401kb WP-01105-1.1-CN
拼接多幅鱼眼图像，产生全景视图 1.0 2009年6月 468kb WP-01107-1.0-CN
保护FPGA设计不受常见的入侵威胁 1.0 2009年8月 198kb WP-01111-1.0-CN
在嵌入式系统中增加硬件加速器，降低功耗 1.0 2009年9月 201kb WP-01112-1.0-CN
采用业界成本最低、功耗最低的FPGA 降低系统总成本 1.0 2009年10月 1.98mb WP-01113-1.0-CN
充分发挥FPGA 浮点IP 内核的优势 1.0 2009年10月 852kb WP-01116-1.0-CN
使用FPGA 实现高清晰视频去隔行功能 1.0 2009年10月 1.43mb WP-01117-1.0-CN
利用成本最优的FPGA 来实现OTN 映射器解决方案 1.0 2009年10月 1.06mb WP-01114-1.0-CN
Stratix III 器件的设计安全性 1.5 2009年9月 205kb WP-01010-1.5-CN
在40G/100G应用中使用10-Gbps收发器 1.2 2009年9月 1.49mb WP-01080-1.2-CN
在便携式应用中，利用零功耗CPLD 来降低系统总成本 2.2 2009年7月 820kb WP-01001-2.2-CN
利用零功耗CPLD 来有效降低便携式应用的功耗 1.2 2009年7月 894kb WP-01042-1.2-CN
灵活的工业以太网解决方案 2.0 2009年7月 2.13mb WP-01037-2.0-CN
实现高性价比家电人机接口 2.0 2009年7月 567kb WP-01083-2.0-CN
“节能意识”家电平台：家庭节能控制的新方法 2.0 2009年7月 1.36mb WP-01077-2.0-CN
灵活的体系结构推动夏普双视角和标准LCD 技术 1.2 2009年7月 865kb WP-01014-1.2-CN
在高可靠性和信息安全保障系统中实现设计分离 1.0 2009年6月 386kb WP-01110-1.0-CN
使用闪存实现MAX 系列配置控制器 2.0 2009年9月 336kb WP-M060605-1.0-CN
在广播应用中实现多速率未压缩视频接口 1.0 2009年3月 868kb WP-01099-1.0-CN
理解SATA/SAS 40-nm FPGA 解决方案 1.3 2009年3月 0.99mb WP-01093-1.3-CN
采用带有收发器的全系列40-nm FPGA 和ASIC 实现创新设计 1.3 2009年3月 1.25mb WP-01078-1.3-CN
在40-nm工艺节点实现世界上最先进的定制逻辑器件 1.1 2009年2月 855kb WP-01058-1.1-CN
远程射频前端及其向4G网络的发展 1.1 2009年2月 741kb WP-01096-1.1-CN
采用一组RTL以及综合/时序约束完成功能等价的FPGA和ASIC 1.2 2009年2月 714kb WP-01095-1.2-CN
采用CPLD 开发多点触摸屏和面板 1.1 2009年2月 741kb WP-01086-1.1-CN
电信应用的功耗最优解决方案 1.0 2009年1月 1.11mb WP-01089-1.0-CN
40-nm FPGA：体系结构和性能对比 1.0 2008年12月 2.77mb WP-01088-1.0-CN
使用PWM 控制数字CPLD 的模拟输出 1.0 2008年11月 419kb WP-01085-1.0-CN
40-nm FPGA功耗管理和优势 1.2 2008年12月 465kb WP-01059-1.2-CN
在新一代智能家电中采用FPGA 实现节能电机控制 1.0 2008年11月 476kb WP-01084-1.0-CN
FPGA和嵌入式处理器实现低成本智能显示模块 1.0 2008年9月 508kb WP-01074-1.0-CN
灵活的现代CPLD汽车数字仪表板 1.0 2008年9月 299kb WP-01072-1.0-CN
大规模FPGA设计中的军事效能因素 1.0 2008年7月 276kb WP-01067-1.0-CN
40-nm FPGA和国防电子设计组织 1.0 2008年7月 512kb WP-01064-1.0-CN
40nm风险可控工艺在军事应用上的优势 1.0 2008年7月 1.15mb WP-01063-1.0-CN
采用Quartus II 渐进式编译技术提高效能 1.0 2008年5月 369kb WP-01062-1.0-CN
采用FPGA集成DSP功能，提高成像应用的性能 1.2 2008年3月 272kb WP-AAB090505-1.2-CN
利用开放系统体系实现新的信息娱乐设备成本结构 1.0 2008年2月 2.02mb WP-01054-1.0-CN
FPGA中的IP集成方法对比 1.0 2008年2月 221kb WP-01032-1.1-CN
通过电路仿真降低无线回程成本 1.0 2008年1月 528kb WP-01049-1.0-CN
利用CPLD来替代微控制器的6种方法 1.1 2007年12月 518kb WP-01041-1.1-CN
在DDR3 SDRAM存储器接口中使用调平技术 1.0 2007年11月 1.02mb WP-01034-1.0-CN
MIMO-OFDMA无线基站的DSP-FPGA系统划分 1.0 2007年10月 1mb WP-01043-1.0-CN
使用Catapult C综合和Altera加速库设计高性能DSP硬件 1.0 2007年10月 918kb WP-01039-1.0-CN
利用高级Cyclone III FPGA PLL，增加灵活性，提高集成度 1.0 2007年10月 978kb WP-01036-1.0-CN
利用安全存储器实现FPGA设计安全解决方案 1.0 2007年10月 313kb WP-01033-1.0-CN
利用FPGA加速实现高性能计算 1.1 2007年10月 287kb WP-01029-1.1-CN
stratix III FPGA 与 Xilinx Virtex-5: 体系结构和性能对比 2.1 2007年10月 2.02mb WP-01007-2.1-CN
实现灵活的汽车电子设计 1.1 2007年9月 289kb WP-01025-1.1-CN
采用FPGA优化雷达和高级传感器 1.0 2007年9月 703kb WP-01038-1.0-CN
定制多业务接入网芯片 1.0 2007年8月 172kb WP-01030-1.0-CN
SDR的体系结构和组件选择 1.0 2007年6月 736kb WP-01026-1.0-CN
在高清晰LCD HDTV中使用Cyclone III FPGA 1.0 2007年5月 294kb WP-01018-1.0-CN
在65nm Cyclone III FPGA中实现低功耗 1.1 2007年4月 347kb WP-01016-1.1-CN
满足消费类显示产品快速增长的功能需求 1.0 2007年5月 1.53mb WP-01015-1.0-CN
采用FPGA实现视频监视 1.1 2007年5月 624kb WP-VIDEOSRVL-1.1-CN
采用FPGA实现视频和图像处理设计 1.1 2007年5月 549kb WP-VIDEO0306-1.1-CN
采用FPGA实现广播基础设施 1.2 2007年5月 736kb WP-BRDCST0306-1.2-CN
寻求高质量数字广播：解决质量热点问题 1.2 2008年2月 304kb WP-01022-1.2-CN
充满信心地设计军用SWaP产品 1.1 2007年4月 1.21mb WP-01020-1.1-CN
在新的无线应用中使用Cyclone III FPGA 1.0 2007 年3 月 785kb WP-01017-1.0-CN
Stratix III FPGA 信号完整性 1.0 2006年11月 921kb WP-01008-1.0-CN
Altera在65nm半导体工艺上的发展策略 1.1 2006年9月 248kb WP-01002-1.1-CN
采用FPGA实现医疗成像 1.0 2006年4月 119kb WP-MEDICAL-1.0-CN

 

Title Doc Version Release Date File Size Document Part Number
White Papers
Subscribe Alert Developing Functional Safety Systems with TÜV-Qualified FPGAs Updated 1.1Mar 2010446 KBWP-01123-1.1
Subscribe Alert Lowering the Total Cost of Ownership for Industrial Applications New 1.0Mar 2010404 KBWP-01122-1.0
Subscribe Alert Quality of Service in Home Networking Updated 1.1Jan 2010524 KBWP-01024-1.1
Subscribe Alert Supporting Digital Television Trends with Next-Generation FPGAs New 1.0Feb 20102 MBWP-01120-1.0
Subscribe Alert Using 10-Gbps Transceivers in 40G/100G Applications Updated 1.3Feb 20101 MBWP-01080-1.3
Subscribe Alert 3-Gbps SDI Video (SMPTE 424M)1.0Apr 2006332 KBWP-3GBPS-1.0
Subscribe Alert 40-nm FPGA Power Management and Advantages1.2Dec 20082 MBWP-01059-1.2
Subscribe Alert 40-nm FPGAs and the Defense Electronic Design Organization1.0Jul 2008313 KBWP-01064-1.0
Subscribe Alert 40-nm FPGAs: Architecture and Performance Comparison1.0Dec 20082 MBWP-01088-1.0
Subscribe Alert 5.0-Volt Tolerance in APEX 20KE Devices1.2Aug 200088 KBWP-APEX5V-1.2
Subscribe Alert A Flexible Architecture for Fisheye Correction in Automotive Rear-View Cameras1.2Oct 2008761 KBWP-01073-1.2
Subscribe Alert A Flexible Architecture to Drive Sharp Two-Way Viewing Angle and Standard LCDs1.2Mar 20072 MBWP-01014-1.2
Subscribe Alert A Flexible Solution for Industrial Ethernet2.0Jul 2009852 KBWP-01037-2.0
Subscribe Alert Accelerating High-Performance Computing With FPGAs1.1Oct 2007956 KBWP-01029-1.1
Subscribe Alert Accelerating WiMAX System Design with FPGAs1.0Oct 2004544 KBWP-FPGA102204-1.0
Subscribe Alert Achieving Low Power in 65-nm Cyclone III FPGAs1.1Apr 2007699 KBWP-01016-1.1
Subscribe Alert Adding Hardware Accelerators to Reduce Power in Embedded Systems 1.0Sep 2009722 KBWP-01112-1.0
Subscribe Alert Addressing SWaP Challenges in Military Platforms With 65-nm FPGAs and Structured ASICs1.0Oct 2007792 KBWP-01045-1.0
Subscribe Alert Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers1.0May 20083 MBWP-01057-1.0
Subscribe Alert Altera Hot-Socketing & Power-Sequencing Advantages1.2Feb 200479 KBWP-HTSCKT-1.2
Subscribe Alert Altera's Strategy for Delivering the Benefits of the 65-nm Semiconductor Process1.1Sep 2006345 KBWP-01002-1.1
Subscribe Alert An Analytical Review of FPGA Logic Efficiency in Stratix, Virtex-II & Virtex-II Pro Devices1.1May 2003117 KBWP-STXVSVRTX-1.1
Subscribe Alert An FPGA Design Security Solution Using a Secure Memory Device1.0Oct 2007510 KBWP-01033-1.0
Subscribe Alert Anti-Tamper Capabilities in FPGA Designs1.0Jul 2008310 KBWP-01066-1.0
Subscribe Alert Applying Graphics to FPGA-Based Solutions1.0Sep 2008131 KBWP-01075-1.0
Subscribe Alert Architectural Differences Between Stratix II & Stratix Devices1.1Jan 2006324 KBWP-STXIIARDF-1.1
Subscribe Alert Architecture and Component Selection for SDR Applications1.0Jun 2007615 KBWP-01026-1.0
Subscribe Alert Assessing FPGA DSP Benchmarks at 40 nm1.0Mar 2009463 KBWP-01102-1.0
Subscribe Alert Automated Generation of Hardware Accelerators With Direct Memory Access From ANSI/ISO Standard C Functions1.0May 2006296 KBWP-AGHRDWR-1.0
Subscribe Alert Automating DSP Simulation and Implementation of Military Sensor Systems1.0Mar 2009373 KBWP-01104-1.0
Subscribe Alert Avoiding PCB Design Mistakes in FPGA-Based Systems
(Taray Inc.) 		1.0Mar 2009935 KBWP-01106-1.0
Subscribe Alert Basic Principles of Signal Integrity1.3Dec 2007548 KBWP-SGNLNTGRY-1.3
Subscribe Alert Benefits of Altera's High-Speed DDR2 SDRAM Memory Interface Solution1.0May 2004273 KBWP-DDRIIFPGA-1.0
Subscribe Alert Board Design Guidelines for LVDS Systems1.0Jul 2000141 KBWP-DESLVDS-1.0
Subscribe Alert Broadcast Video Infrastructure Implementation Using FPGAs1.2Mar 2007596 KBWP-BRDCST0306-1.2
Subscribe Alert Building Flexible, Cost-Efficient Broadband Access Equipment Line Cards1.0Sep 2006303 KBWP-01005-1.0
Subscribe Alert Challenges in Manufacturing Reliable Lead Free Components1.0Feb 2004388 KBWP-CHMFGRELLDFR-1.0
Subscribe Alert Comparing IP Integration Approaches for FPGA Implementation1.1Feb 2008195 KBWP-01032-1.1
Subscribe Alert Compromises of Using a 10-Gbps Transceiver at Other Data Rates1.0Jul 2005100 KBWP-032205-1.0
Subscribe Alert Configuring the MicroBlaster Fast Passive Parallel Software Driver
     Source Code (25 KB) 		1.0May 200361 KBWP-MCRBLSTRPLL-1.0
Subscribe Alert Controlling Analog Output From a Digital CPLD Using PWM1.0Nov 2008181 KBWP-01085-1.0
Subscribe Alert Creating Low-Cost Intelligent Display Modules With an FPGA and Embedded Processor1.0Sep 2008725 KBWP-01074-1.0
Subscribe Alert Crest Factor Reduction for OFDM-Based Wireless Systems1.0Dec 2008164 KBWP-01090-1.0
Subscribe Alert Custom NPUs for Broadband Access Line Cards1.0Dec 2007639 KBWP-01048-1.0
Subscribe Alert Customizing Multi-Service Access Network Silicon1.0Aug 2007724 KBWP-01030-1.0
Subscribe Alert DDR & DDR2 SDRAM Controller Compiler FAQ1.1Dec 200466 KBWP-IPFAQ-1.0
Subscribe Alert Decrease Total System Costs with Industry's Lowest Cost, Lowest Power FPGAs1.0Nov 20098 MBWP-01113-1.0
Subscribe Alert Design Security in Stratix III Devices1.5Sep 200944 KBWP-01010-1.5
Subscribe Alert Designing and Using FPGAs for Double-Precision Floating-Point Math1.1Aug 2007683 KBWP-01028-1.1
Subscribe Alert Designing High-Performance DSP Hardware Using Catapult C Synthesis and the Altera Accelerated Libraries1.0Oct 2007687 KBWP-01039-1.0
Subscribe Alert Designing Home Appliances With FPGAs1.0Jul 2007617 KBWP-01027-1.0
Subscribe Alert Designing With Confidence for Military SDR Production Applications1.1Apr 20072 MBWP-01020-1.1
Subscribe Alert Developing MSAN Equipment Using Low-Cost FPGAs1.1Jan 2008624 KBWP-01046-1.1
Subscribe Alert Developing Multipoint Touch Screens and Panels With CPLDs1.1Feb 2009451 KBWP-01086-1.1
Subscribe Alert DO-254 Support for FPGA Design Flows1.0Jul 200891 KBWP-01065-1.0
Subscribe Alert DPA Circuitry and rx_dpa_locked Signal Behavior in Stratix III Devices1.0Jun 2008204 KBWP-01068-1.0
Subscribe Alert Driving Flexibility Into Automotive Electronics Design1.1Sep 2007239 KBWP-01025-1.1
Subscribe Alert DSP-FPGA System Partitioning for MIMO-OFDMA Wireless Basestations1.0Oct 2007972 KBWP-01043-1.0
Subscribe Alert Electronic Warfare Design With PLDs and High-Speed Transceivers1.0Dec 20071 MBWP-01052-1.0
Subscribe Alert Enabling Design Separation for High-Reliability and Information-Assurance Systems1.0Jun 2009159 KBWP-01110-1.0
Subscribe Alert Enabling Ethernet-Over-NG-SONET/SDH/PDH Solutions for MSPP Linecards1.0Apr 2009102 KBWP-01098-1.0
Subscribe Alert Enabling Image Format Conversion in FPGAs1.1Jun 2009615 KBWP-01105-1.1
Subscribe Alert Enabling New Infotainment-Equipment Cost Structures With Open-System Architectures1.0Feb 2008757 KBWP-01054-1.0
Subscribe Alert Enabling Quality of Service With Customizable Traffic Managers1.0Sep 2005265 KBWP-STXIITRFC-1.0
Subscribe Alert Energy-Aware Appliance Platform: A New Approach to Home Energy Control 2.0Jul 2009286 KBWP-01077-2.0
Subscribe Alert Enhancing High-Speed Telecommunications Networks with FEC1.0Feb 2001109 KBWP-IPRSFEC-1.0
Subscribe Alert Floating-Point Compiler: Increasing Performance With Fewer Resources1.0Nov 2007542 KBWP-01050-1.0
Subscribe Alert FPGA Architecture1.0Sep 2006637 KBWP-01003-1.0
Subscribe Alert FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance1.1Jun 2009303 KBWP-01031-1.1
Subscribe Alert FPGA Design Security Solution Using MAX II Devices1.0Sep 200452 KBWP-M2DSGN 1.0
Subscribe Alert FPGA Integration Increases Flexibility, Reduces Cost in Consumer Applications1.1Feb 2006204 KBWP-AAB090205-1.1
Subscribe Alert FPGA Performance Benchmarking Methodology1.6Aug 2007246 KBWP-FPGAPBM-1.6
Subscribe Alert FPGA Power Management and Modeling Techniques1.0Nov 2007696 KBWP-01044-1.0
Subscribe Alert FPGA Run-Time Reconfiguration: Two Approaches1.0Mar 2008362 KBWP-01055-1.0
Subscribe Alert FPGA vs. DSP Design Reliability and Maintenance1.1May 2007147 KBWP-01023-1.1
Subscribe Alert FPGAs at 40 nm and >10 Gbps: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers1.0Apr 20093 MBWP-01092-1.0
Subscribe Alert FPGAs Enable Energy-Efficient Motor Control in Next-Generation Smart Home Appliances1.0Nov 2008309 KBWP-01084-1.0
Subscribe Alert FPGAs for High-Performance DSP Applications1.1May 2005119 KBWP-041905-1.1
Subscribe Alert FPGAs Provide Reconfigurable DSP Solutions1.0Aug 2002216 KBWP-FPGA/DSP-1.0
Subscribe Alert Gain Flexibility and Increased Integration With Advanced Cyclone III FPGA PLLs1.0Oct 20071 MBWP-01036-1.0
Subscribe Alert Gain Flexibility, Lower Costs in Display Control Through Integration With FPGAs1.1Feb 2006265 KBWP-AAB090905-1.1
Subscribe Alert Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints1.2Feb 2009459 KBWP-01095-1.2
Subscribe Alert Generating Panoramic Views by Stitching Multiple Fisheye Images1.0May 2009779 KBWP-01107-1.0
Subscribe Alert Guidance for Accurately Benchmarking FPGAs1.2Dec 2007848 KBWP-01040-1.2
Subscribe Alert Hardware/Software Co-Verification Using FPGA Platforms1.0Aug 2008754 KBWP-01070-1.0
Subscribe Alert High-Definition Video Deinterlacing Using FPGAs1.0Oct 20091 MBWP-01117-1.0
Subscribe Alert Hot-Socketing & Power-Sequencing Feature & Testing for Altera Devices1.1May 2006319 KBWP-HTSCKTNG-1.1
Subscribe Alert Image-Based Driver Assistance Development Environment1.0Dec 2008419 KBWP-01091-1.0
Subscribe Alert Implementation of CORDIC-Based QRD-RLS Algorithm on Altera Stratix FPGA with Embedded Nios Soft Processor Technology1.0Mar 2004119 KBWP-STXQRD-01
Subscribe Alert Implementation of the Smith-Waterman Algorithm on a Reconfigurable Supercomputing Platform1.0Sep 20071 MBWP-01035-1.0
Subscribe Alert Implementing a Cost-Effective Human-Machine Interface for Home Appliances2.0Jul 2009305 KBWP-01083-2.0
Subscribe Alert Implementing a Flexible CPLD-Only Digital Dashboard for Automobiles1.0Sep 2008296 KBWP-01072-1.0
Subscribe Alert Implementing a Multirate Uncompressed Video Interface for Broadcast Applications1.0Mar 2009526 KBWP-01099-1.0
Subscribe Alert Implementing a Queue Manager in Traffic Management Systems1.1Feb 2004125 KBWP-QMGR-1.1
Subscribe Alert Implementing Digital IF & Digital Predistortion Linearizer Functions with Programmable Logic1.0May 2003244 KBWP-DIGITALDIS-1.0
Subscribe Alert Implementing the MicroBlaster Configuration on the ColdFire Development Board
     Source Code for the MicroBlaster on ColdFire Board (167 KB) 		1.0Feb 2002102 KBWP-MCRBLSTR-1.0
Subscribe Alert Improving Pin-to-Pin Timing in Stratix & Stratix GX1.0Apr 2004170 KBWP-STXTCO-1.0
Subscribe Alert Increase Bandwidth in Medical & Industrial Applications With FPGA Co-Processors2.1Feb 2006494 KBWP-PLDMDCL-2.1
Subscribe Alert Increase Flexibility in Layer 2 Switches by Integrating Ethernet ASSP Functions Into FPGAs1.1Feb 2006421 KBWP-AAB091005-1.1
Subscribe Alert Increase Performance in Imaging Applications by Integrating DSP Functions With FPGAs1.2Mar 200853 KBWP-AAB090505-1.2
Subscribe Alert Increase Performance in Video and Image Processing Applications With FPGA Integration1.2Mar 200858 KBWP-AAB090705-1.2
Subscribe Alert Increasing Productivity With Quartus II Incremental Compilation1.0May 2008169 KBWP-01062-1.0
Subscribe Alert Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers1.3Mar 2009932 KBWP-01078-1.3
Subscribe Alert Input Signal Edge Rate Guidance1.0Jun 200563 KBWP-060205-1.0
Subscribe Alert IPTV’s Key Broadcast Building Blocks1.0Apr 2006486 KBWP-BRDCST-1.0
Subscribe Alert Leveraging Cost-Optimized FPGAs to Deliver OTN Mapper Solutions1.0Oct 2009652 KBWP-01114-1.0
Subscribe Alert Leveraging the 40-nm Process Node to Deliver the World's Most Advanced Custom Logic Devices1.1Feb 2009377 KBWP-01058-1.1
Subscribe Alert Low-Cost FPGA Solution for PCI Express Implementation1.0Mar 2006148 KBWP-LWCST-1.0
Subscribe Alert Low-Cost Integration of Serial EEPROMs and Flash Memory Devices1.2Mar 200884 KBWP-LWCST05-1.2
Subscribe Alert Lower Costs in Broadcasting Applications With Integration Using FPGAs1.1Feb 2006215 KBWP-AAB090405-1.1
Subscribe Alert MAX II I/O Characteristics During Hot Socketing1.0Mar 2006463 KBWP-M2HTSCKNG-1.0
Subscribe Alert MAX II Logic Element to Macrocell Conversion Methodology1.0Mar 200472 KBWP-MXIILGC-1.0
Subscribe Alert MAX Series Configuration Controller Using Flash Memory2.0Sep 2009131 KBWP-M060605-2.0
Subscribe Alert Medical Imaging Implementation Using FPGAs1.0Apr 2006190 KBWP-MEDICAL-1.0
Subscribe Alert Military Benefits of the Managed Risk Process at 40 nm1.0Jul 2008993 KBWP-01063-1.0
Subscribe Alert Military Productivity Factors in Large FPGA Designs1.0Jul 2008443 KBWP-01067-1.0
Subscribe Alert Minimizing Ground Bounce & VCC Sag1.0Nov 2001725 KBWP-GRNDBNCE-1.0
Subscribe Alert MorphIO: An I/O Reconfiguration Solution for Altera Devices
     Tcl File (5 KB)
     Readme File (7 KB) 		1.0May 200346 KBWP-I/ORECONFIG-1.0
Subscribe Alert Optical Transport Networks for 100G Implementation in FPGAs1.0Oct 20091 MBWP-01115-1.0
Subscribe Alert Optimize System Flexibility by Integrating Custom Microprocessors Into FPGAs1.1Feb 2006237 KBWP-AAB090805-1.1
Subscribe Alert Optimizing Radar and Advanced Sensors Functions With FPGAs1.0Sep 20071,007 KBWP-01038-1.0
Subscribe Alert Performing Equivalent Timing Analysis Between Altera Classic Timing Analyzer and Xilinx Trace3.0Oct 20071 MBWP-TMANAL-3.0
Subscribe Alert Performing Equivalent Timing Analysis Between Altera TimeQuest and Xilinx Trace1.0Nov 20071 MBWP-01047-1.0
Subscribe Alert Power-Optimized Solutions for Telecom Applications1.0Jan 2009594 KBWP-01089-1.0
Subscribe Alert Programmable Platform Solutions1.0Aug 2006756 KBWP-01004-1.0
Subscribe Alert Protecting the FPGA Design From Common Threats1.0Jun 2009193 KBWP-01111-1.0
Subscribe Alert Reduce Manufacturing Costs by Integrating Flash Device Programming1.2Mar 200846 KBWP-92005-1.2
Subscribe Alert Reduce System Costs By Integrating PCI Interface Functions Into CPLDs1.3Mar 2008116 KBWP-AAB090305-1.3
Subscribe Alert Reduce Total System Cost in Portable Applications Using MAX II CPLDs2.2Jul 2009504 KBWP-01001-2.2
Subscribe Alert Reducing the Cost of Wireless Backhauling Through Circuit Emulation1.0Jan 20082 MBWP-01049-1.0
Subscribe Alert Remote Radio Heads and the Evolution Towards 4G Networks
(Radiocomp) 		1.1Feb 2009718 KBWP-01096-1.1
Subscribe Alert Robust SEU Mitigation With Stratix III FPGAs1.0Feb 2007801 KBWP-01012-1.0
Subscribe Alert Satisfying the Demand for Rapid Feature Enhancement in Consumer Display Products1.0Mar 2007980 KBWP-01015-1.0
Subscribe Alert Selecting the Correct High Speed Transceiver Solution1.0Sep 20032 MBWP-HGSPDTRNS-1.0
Subscribe Alert Selecting the Ideal FPGA Vendor for Military Programs1.0Feb 2009163 KBWP-01094-1.0
Subscribe Alert Selecting the Right High-Speed Memory Technology for Your System2.0Aug 2008586 KBWP-S852004-2.0
Subscribe Alert SEmulation: Turbocharging the FPGA Development Process1.0Mar 20071 MBWP-01021-1.0
Subscribe Alert SerialLite Protcol Overview1.1Jul 2004136 KBWP-SERIALLT-1.1
Subscribe Alert Signal Integrity Comparisons Between Stratix II and Virtex-4 FPGAs1.0Mar 2005557 KBWP-022805-1.0
Subscribe Alert Simplifying Simultaneous Multimode RRH Hardware Design1.0Mar 20091 MBWP-01097-1.0
Subscribe Alert Single-Resistor RSDS Solution for Cyclone II Devices1.0Oct 2005180 KBWP-C20905-1.0
Subscribe Alert Six Ways to Replace a Microcontroller With a CPLD1.2Jul 20091 MBWP-01041-1.2
Subscribe Alert Soft Multipliers For DSP Applications1.0May 2003490 KBWP-DSPSFTMULT-1.0
Subscribe Alert Stratix GX in Storage Applications1.0Nov 200280 KBWP-STXSTRAPP-1.0
Subscribe Alert Stratix GX in Switch Fabric Systems1.0Nov 2002222 KBWP-STXGXSFS-1.0
Subscribe Alert Stratix II DDR2 System Validation Summary1.0May 20061 MBWP-S2DDR2SVS-1.0
Subscribe Alert Stratix II DSP Performance2.0Jan 2005241 KBWP-STXIIDSP-2.0
Subscribe Alert Stratix II Performance and Logic Efficiency Analysis2.0Sep 20061 MBWP-STXIIPLE-2.0
Subscribe Alert Stratix II vs. Virtex-4 Density Comparison2.2Aug 2005264 KBWP-STXIIXLNX-2.2
Subscribe Alert Stratix II vs. Virtex-4 Performance Comparison2.0Sep 2006505 KBWP-S2052505-2.0
Subscribe Alert Stratix II vs. Virtex-4 Power Comparison & Estimation Accuracy1.0Aug 2005356 KBWP-S20805-1.0
Subscribe Alert Stratix III FPGA Signal Integrity1.0Nov 2006797 KBWP-01008-1.0
Subscribe Alert Stratix III FPGAs vs. Xilinx Virtex-5 Devices: Architecture and Performance Comparison2.1Oct 2007949 KBWP-01007-2.1
Subscribe Alert Stratix III Programmable Power1.1May 2007632 KBWP-01006-1.1
Subscribe Alert Stratix vs. Virtex-II Pro FPGA Performance Analysis1.1Nov 2004146 KBWP-STXVRTXIIPFP-1.1
Subscribe Alert Supporting Unknown FREF Video Applications With PLLs
     Unknown FREF Reference Design (931 KB) 		1.0Mar 2008172 KBWP-01056-1.0
Subscribe Alert Taking Advantage of Advances in FPGA Floating-Point IP Cores1.0Oct 2009630 KBWP-01116-1.0
Subscribe Alert The Benefits of Altera’s High-Speed DDR SDRAM Memory Interface Solution1.1May 2004358 KBWP-DDRFPGA-1.1
Subscribe Alert The Efficiency of the DDR & DDR2 SDRAM Controller Compiler1.1Dec 200449 KBWP-IPDDR-1.0
Subscribe Alert The Evolution of High Speed Transceiver Technology1.0Nov 2002438 KBWP-STGXHST-1.0
Subscribe Alert The Need for Dynamic Phase Alignment in High-Speed FPGAs1.1Feb 200471 KBWP-STXGXDPA-1.1
Subscribe Alert The Quest for Digital Broadcast Quality: Addressing Quality Hot Spots1.2Feb 2008679 KBWP-01022-1.2
Subscribe Alert TimeQuest Timing Analyzer: Native SDC Support for Timing Analysis of FPGA-Based Designs1.0May 2006792 KBWP-TMQST-1.0
Subscribe Alert Traffic Management for Testing Triple-Play Services1.0Mar 2006461 KBWP-TRFFC-1.0
Subscribe Alert Traffic Management in Stratix GX Devices1.0Dec 200269 KBWP-STGXTRFFC-1.0
Subscribe Alert Transient Voltage Protection for Stratix GX Devices1.0Jan 2005283 KBWP-SGX012105-1.0
Subscribe Alert Understanding 40-nm FPGA Solutions for SATA/SAS1.3Mar 2009404 KBWP-01093-1.3
Subscribe Alert Understanding Metastability in FPGAs1.2Jul 2009584 KBWP-01082-1.2
Subscribe Alert Upgrading a DDR SDRAM Controller MegaCore Function v2.1.* Design to v2.2.01.0Jun 200474 KBWP-MFDDR-1.0
Subscribe Alert Using Cyclone III FPGAs for Clearer LCD HDTV Implementation1.0Mar 2007214 KBWP-01018-1.0
Subscribe Alert Using Cyclone III FPGAs for Emerging Wireless Applications1.0Mar 2007683 KBWP-01017-1.0
Subscribe Alert Using FPGA-Based Channel Bonding for HDTV Over DSL1.0Feb 2008152 KBWP-01053-1.0
Subscribe Alert Using FPGAs to Render Graphics and Drive LCD Interfaces1.0Apr 2009686 KBWP-01100-1.0
Subscribe Alert Using LEDs as Light-Level Sensors and Emitters
     “LED Sensor and Emitter” Reference Design (76 KB)
     “Light-Sensing LED and PWM Flashing LED Development Platform” Reference Design for the MAX II Starter Kit (25 KB)
     “Light-Sensing LED and PWM Flashing LED Development Platform” Reference Design for the MAX IIZ Demo Board (47 KB) 		2.1Oct 2009911 KBWP-01076-2.1
Subscribe Alert Using Parity to Detect Memory Errors in Stratix Devices1.2Feb 200597 KBWP-STXPARITY-1.2
Subscribe Alert Using Pre-Emphasis and Equalization with Stratix GX1.0Sep 20032 MBWP-SGXEQUAL-1.0
Subscribe Alert Using Stratix GX Devices for SONET/SDH Backplanes1.1May 2004193 KBWP-STXSNTSDH-1.1
Subscribe Alert Using Stratix II GX in HDTV Video Production Applications2.0Sep 2005106 KBWP-STXGXDTVS-2.0
Subscribe Alert Using the Intel Flash Memory-Based EPC4, EPC8 & EPC16 Devices
     EPC Programming File Conversion Utility (108 KB) 		1.1Oct 2005228 KBWP-FMB1005-1.1
Subscribe Alert Using Zero-Power CPLDs to Substantially Lower Power Consumption in Portable Applications1.2Jul 20091 MBWP-01042-1.2
Subscribe Alert Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces1.0Nov 2007812 KBWP-01034-1.0
Subscribe Alert Versatile Digital QAM Modulator1.1Jan 2006586 KBWP-STXIIQAM-1.1
Subscribe Alert Video and Image Processing Design Using FPGAs1.1Mar 2007488 KBWP-VIDEO0306-1.1
Subscribe Alert Video Processing on FPGAs for Military Electro-Optical/Infrared Applications1.0Mar 2009309 KBWP-01101-1.0
Subscribe Alert Video Surveillance Implementation Using FPGAs1.1Mar 2007507 KBWP-VIDEOSRVL-1.1
Subscribe Alert Voltage Regulator Selection for FPGAs1.0Nov 2008306 KBWP-01071-1.0

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