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主页 > 产品 > 资料 > Stratix IV(E和GX) > 资料： 白皮书 打印此页 订阅电邮新闻 资料： 白皮书 Title Doc Version Release Date File Size Document Part Number White Papers 40-nm FPGAs and the Defense Electronic Design Organization 1.0 Jul 2008 313 KB WP-01064-1.0 Anti-Tamper Capabilities in FPGA Designs 1.0 Jul 2008 310 KB WP-01066-1.0 DO-254 Support for FPGA Design Flows 1.0 Jul 2008 91 KB WP-01065-1.0 Hardware/Software Co-Verification Using FPGA Platforms 1.0 Aug 2008 754 KB WP-01070-1.0 Military Benefits of the Managed Risk Process at 40 nm 1.0 Jul 2008 993 KB WP-01063-1.0 Military Productivity Factors in Large FPGA Designs 1.0 Jul 2008 443 KB WP-01067-1.0 Selecting the Right High-Speed Memory Technology for Your System 2.0 Aug 2008 586 KB WP-S852004-2.0 3-Gbps SDI Video (SMPTE 424M) 1.0 Apr 2006 332 KB WP-3GBPS-1.0 5.0-Volt Tolerance in APEX 20KE Devices 1.2 Aug 2000 88 KB A-WP-APEX5V-1.2 A Flexible Architecture to Drive Sharp Two-Way Viewing Angle and Standard LCDs 1.2 Mar 2007 2 MB WP-01014-1.2 A Flexible Solution for Industrial Ethernet 1.0 Oct 2007 699 KB WP-01037-1.0 Accelerating High-Performance Computing With FPGAs 1.1 Oct 2007 956 KB WP-01029-1.1 Accelerating WiMAX System Design with FPGAs 1.0 Oct 2004 544 KB WP-FPGA102204-1.0 Achieving Low Power in 65-nm Cyclone III FPGAs 1.1 Apr 2007 699 KB WP-01016-1.1 Addressing SWaP Challenges in Military Platforms With 65-nm FPGAs and Structured ASICs 1.0 Oct 2007 792 KB WP-01045-1.0 Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers 1.0 May 2008 3 MB WP-01057-1.0 Altera Hot-Socketing & Power-Sequencing Advantages 1.2 Feb 2004 79 KB WP-HTSCKT-1.2 Altera's Strategy for Delivering the Benefits of the 65-nm Semiconductor Process 1.1 Sep 2006 345 KB WP-01002-1.1 An Analytical Review of FPGA Logic Efficiency in Stratix, Virtex-II & Virtex-II Pro Devices 1.1 May 2003 117 KB WP-STXVSVRTX-1.1 An FPGA Design Security Solution Using a Secure Memory Device 1.0 Oct 2007 510 KB WP-01033-1.0 Architectural Differences Between Stratix II & Stratix Devices 1.1 Jan 2006 324 KB WP-STXIIARDF-1.1 Architecture and Component Selection for SDR Applications 1.0 Jun 2007 615 KB WP-01026-1.0 Automated Generation of Hardware Accelerators With Direct Memory Access From ANSI/ISO Standard C Functions 1.0 May 2006 296 KB WP-AGHRDWR Basic Principles of Signal Integrity 1.3 Dec 2007 548 KB WP-SGNLNTGRY-1.3 Benefits of Altera's High-Speed DDR2 SDRAM Memory Interface Solution 1.0 May 2004 273 KB WP-DDRIIFPGA-1.0 Broadcast Video Infrastructure Implementation Using FPGAs 1.2 Mar 2007 596 KB WP-BRDCST0306-1.2 Building Flexible, Cost-Efficient Broadband Access Equipment Line Cards 1.0 Sep 2006 303 KB WP-01005-1.0 Challenges in Manufacturing Reliable Lead Free Components 1.0 Feb 2004 388 KB WP-CHMFGRELLDFR-1.0 Comparing IP Integration Approaches for FPGA Implementation 1.1 Feb 2008 195 KB WP-01032-1.1 Compromises of Using a 10-Gbps Transceiver at Other Data Rates 1.0 Jul 2005 100 KB WP-032205-1.0 Configuring the MicroBlaster Fast Passive Parallel Software Driver      Source Code (25 KB) 1.0 May 2003 61 KB WP-MCRBLSTRPLL-1.0 Custom NPUs for Broadband Access Line Cards 1.0 Dec 2007 639 KB WP-01048-1.0 Customizing Multi-Service Access Network Silicon 1.0 Aug 2007 724 KB WP-01030-1.0 DDR & DDR2 SDRAM Controller Compiler FAQ 1.1 Dec 2004 66 KB WP-IPFAQ Design Security in Stratix III Devices 1.4 Nov 2006 288 KB WP-01010-1.4 Designing and Using FPGAs for Double-Precision Floating-Point Math 1.1 Aug 2007 683 KB WP-01028-1.1 Designing High-Performance DSP Hardware Using Catapult C Synthesis and the Altera Accelerated Libraries 1.0 Oct 2007 687 KB WP-01039-1.0 Designing Home Appliances With FPGAs 1.0 Jul 2007 617 KB WP-01027-1.0 Designing With Confidence for Military SDR Production Applications 1.1 Apr 2007 2 MB WP-01020-1.1 Developing MSAN Equipment Using Low-Cost FPGAs 1.1 Jan 2008 624 KB WP-01046-1.1 DPA Circuitry and rx_dpa_locked Signal Behavior in Stratix III Devices 1.0 Jun 2008 204 KB WP-01068-1.0 Driving Flexibility Into Automotive Electronics Design 1.1 Sep 2007 239 KB WP-01025-1.1 DSP-FPGA System Partitioning for MIMO-OFDMA Wireless Basestations 1.0 Oct 2007 972 KB WP-01043-1.0 Electronic Warfare Design With PLDs and High-Speed Transceivers 1.0 Dec 2007 1 MB WP-01052-1.0 Enabling New Infotainment-Equipment Cost Structures With Open-System Architectures 1.0 Feb 2008 757 KB WP-01054-1.0 Enhancing High-Speed Telecommunications Networks with FEC 1.0 Feb 2001 109 KB M-WP-IPRSFEC-01 Floating-Point Compiler: Increasing Performance With Fewer Resources 1.0 Nov 2007 542 KB WP-01050-1.0 FPGA Architecture 1.0 Sep 2006 637 KB WP-01003-1.0 FPGA Design Security Solution Using MAX II Devices 1.0 Sep 2004 52 KB WP-M2DSGN 1.0 FPGA Integration Increases Flexibility, Reduces Cost in Consumer Applications 1.1 Feb 2006 204 KB WP-AAB090205-1.1 FPGA Performance Benchmarking Methodology 1.6 Aug 2007 246 KB WP-FPGAPBM-1.6 FPGA Power Management and Modeling Techniques 1.0 Nov 2007 696 KB WP-01044-1.0 FPGA Run-Time Reconfiguration: Two Approaches 1.0 Mar 2008 362 KB WP-01055-1.0 FPGA vs. DSP Design Reliability and Maintenance 1.1 May 2007 147 KB wp-01023-1.1 FPGAs for High-Performance DSP Applications 1.1 May 2005 119 KB WP-041905-1.1 FPGAs Provide Reconfigurable DSP Solutions 1.0 Aug 2002 216 KB WP-FPGA/DSP-1.0 Gain Flexibility and Increased Integration With Advanced Cyclone III FPGA PLLs 1.0 Oct 2007 1 MB WP-01036-1.0 Gain Flexibility, Lower Costs in Display Control Through Integration With FPGAs 1.1 Feb 2006 265 KB WP-AAB090905-1.1 Guidance for Accurately Benchmarking FPGAs 1.2 Dec 2007 848 KB WP-01040-1.2 Hot-Socketing & Power-Sequencing Feature & Testing for Altera Devices 1.1 May 2006 319 KB WP-HTSCKTNG-1.1 Implementation of CORDIC-Based QRD-RLS Algorithm on Altera Stratix FPGA with Embedded Nios Soft Processor Technology 1.0 Mar 2004 119 KB WP-STXQRD-01 Implementation of the Smith-Waterman Algorithm on a Reconfigurable Supercomputing Platform 1.0 Sep 2007 1 MB WP-01035-1.0 Implementing a Queue Manager in Traffic Management Systems 1.1 Feb 2004 125 KB WP-QMGR-1.1 Implementing the MicroBlaster Configuration on the ColdFire Development Board      Source Code for the MicroBlaster on ColdFire Board (167 KB) 1.0 Feb 2002 102 KB WP-MCRBLSTR-1.0 Improving Pin-to-Pin Timing in Stratix & Stratix GX 1.0 Apr 2004 170 KB WP-STXTCO-1.0 Increase Bandwidth in Medical & Industrial Applications With FPGA Co-Processors 2.1 Feb 2006 494 KB WP-PLDMDCL-2.1 Increase Flexibility in Layer 2 Switches by Integrating Ethernet ASSP Functions Into FPGAs 1.1 Feb 2006 421 KB WP-AAB091005-1.1 Increase Performance in Imaging Applications by Integrating DSP Functions With FPGAs 1.2 Mar 2008 53 KB WP-AAB090505-1.2 Increase Performance in Video and Image Processing Applications With FPGA Integration 1.2 Mar 2008 58 KB WP-AAB090705-1.2 Increasing Productivity With Quartus II Incremental Compilation 1.0 May 2008 169 KB WP-01062-1.0 Input Signal Edge Rate Guidance 1.0 Jun 2005 63 KB WP-060205-1.0 IPTV’s Key Broadcast Building Blocks 1.0 Apr 2006 486 KB WP-BRDCST-1.0 Leveraging the 40-nm Process Node to Deliver the World's Most Advanced Custom Logic Devices 1.0 May 2008 371 KB WP-01058-1.0 Low-Cost FPGA Solution for PCI Express Implementation 1.0 Mar 2006 148 KB WP-LWCST-1.0 Low-Cost Integration of Serial EEPROMs and Flash Memory Devices 1.2 Mar 2008 84 KB WP-LWCST05-1.2 Lower Costs in Broadcasting Applications With Integration Using FPGAs 1.1 Feb 2006 215 KB WP-AAB090405-1.1 MAX II I/O Characteristics During Hot Socketing 1.0 Mar 2006 463 KB WP-M2HTSCKNG-1.0 MAX II Logic Element to Macrocell Conversion Methodology 1.0 Mar 2004 72 KB WP-MXIILGC-1.0 MAX Series Configuration Controller using Flash Memory      Reference Design (37 KB) 1.0 Jun 2005 130 KB WP-M060605-1.0 Medical Imaging Implementation Using FPGAs 1.0 Apr 2006 190 KB WP-MEDICAL-1.0 MorphIO: An I/O Reconfiguration Solution for Altera Devices      Tcl File (5 KB)      Readme File (7 KB) 1.0 May 2003 46 KB WP-I/ORECONFIG-1.0 Optimize System Flexibility by Integrating Custom Microprocessors Into FPGAs 1.1 Feb 2006 237 KB WP-AAB090805-1.1 Optimizing Radar and Advanced Sensors Functions With FPGAs 1.0 Sep 2007 1,007 KB WP-01038-1.0 Performing Equivalent Timing Analysis Between Altera Classic Timing Analyzer and Xilinx Trace 3.0 Oct 2007 1 MB WP-TMANAL-3.0 Performing Equivalent Timing Analysis Between Altera TimeQuest and Xilinx Trace 1.0 Nov 2007 1 MB WP-01047-1.0 Programmable Platform Solutions 1.0 Aug 2006 756 KB WP-01004-1.0 Quality of Service in Home Networking 1.0 May 2007 640 KB WP-01024-1.0 Reduce Manufacturing Costs by Integrating Flash Device Programming 1.2 Mar 2008 46 KB WP-92005-1.2 Reduce System Costs By Integrating PCI Interface Functions Into CPLDs 1.3 Mar 2008 116 KB WP-AAB090305-1.3 Reduce Total System Cost in Portable Applications Using MAX II CPLDs 1.0 Jul 2006 445 KB WP-01001-1.0 Reduce Total System Cost in Portable Applications Using MAX II CPLDs 2.1 Dec 2007 504 KB WP-01001-2.1 Reducing the Cost of Wireless Backhauling Through Circuit Emulation 1.0 Jan 2008 2 MB WP-01049-1.0 Robust SEU Mitigation With Stratix III FPGAs 1.0 Feb 2007 801 KB WP-01012-1.0 Satisfying the Demand for Rapid Feature Enhancement in Consumer Display Products 1.0 Mar 2007 980 KB WP-01015-1.0 Selecting the Correct High Speed Transceiver Solution 1.0 Sep 2003 2 MB WP-HGSPDTRNS-1.0 SEmulation: Turbocharging the FPGA Development Process 1.0 Mar 2007 1 MB WP-01021-1.0 SerialLite Protcol Overview 1.1 Jul 2004 136 KB WP-SERIALLT-1.1 Signal Integrity Comparisons Between Stratix II and Virtex-4 FPGAs 1.0 Mar 2005 557 KB WP-022805-1.0 Single-Resistor RSDS Solution for Cyclone II Devices 1.0 Oct 2005 180 KB WP-C20905 Six Ways to Replace a Microcontroller With a CPLD 1.1 Dec 2007 800 KB WP-01041-1.1 Soft Multipliers For DSP Applications 1.0 May 2003 490 KB WP-DSPSFTMULT-1.0 Stratix GX in Storage Applications 1.0 Nov 2002 80 KB WP-STXSTRAPP-1.0 Stratix GX in Switch Fabric Systems 1.0 Nov 2002 222 KB WP-STXGXSFS-1.0 Stratix II DDR2 System Validation Summary 1.0 May 2006 1 MB WP-S2DDR2SVS-1.0 Stratix II DSP Performance 2.0 Jan 2005 241 KB WP-STXIIDSP-2.0 Stratix II Performance and Logic Efficiency Analysis 2.0 Sep 2006 1 MB WP-STXIIPLE-2.0 Stratix II vs. Virtex-4 Density Comparison 2.2 Aug 2005 264 KB WP-STXIIXLNX-2.2 Stratix II vs. Virtex-4 Performance Comparison 2.0 Sep 2006 505 KB WP-S2052505-2.0 Stratix II vs. Virtex-4 Power Comparison & Estimation Accuracy 1.0 Aug 2005 356 KB WP- S20805-01 Stratix III FPGA Signal Integrity 1.0 Nov 2006 797 KB WP-01008-1.0 Stratix III FPGAs vs. Xilinx Virtex-5 Devices: Architecture and Performance Comparison 2.1 Oct 2007 949 KB WP-01007-2.1 Stratix III Programmable Power 1.1 May 2007 632 KB WP-01006-1.1 Stratix IV FPGA Power Management and Advantages 1.0 May 2008 2 MB WP-01059-1.0 Stratix vs. Virtex-II Pro FPGA Performance Analysis 1.1 Nov 2004 146 KB WP-STXVRTXIIPFP-1.1 Supporting Unknown FREF Video Applications With PLLs      Unknown FREF Reference Design (931 KB) 1.0 Mar 2008 172 KB WP-01056-1.0 The Benefits of Altera’s High-Speed DDR SDRAM Memory Interface Solution 1.1 May 2004 358 KB WP-DDRFPGA-1.1 The Efficiency of the DDR & DDR2 SDRAM Controller Compiler 1.1 Dec 2004 49 KB WP-IPDDR The Evolution of High Speed Transceiver Technology 1.0 Nov 2002 438 KB WP-STGXHST-1.0 The Need for Dynamic Phase Alignment in High-Speed FPGAs 1.1 Feb 2004 71 KB WP-STXGXDPA-1.1 The Quest for Digital Broadcast Quality: Addressing Quality Hot Spots 1.2 Feb 2008 679 KB WP-01022-1.2 TimeQuest Timing Analyzer: Native SDC Support for Timing Analysis of FPGA-Based Designs 1.0 May 2006 792 KB WP-TMQST-1.0 Traffic Management for Testing Triple-Play Services 1.0 Mar 2006 461 KB WP-TRFFC-1.0 Traffic Management in Stratix GX Devices 1.0 Dec 2002 69 KB WP-STGXTRFFC-1.0 Transient Voltage Protection for Stratix GX Devices 1.0 Jan 2005 283 KB WP-SGX012105-1.0 Upgrading a DDR SDRAM Controller MegaCore Function v2.1.* Design to v2.2.0 1.0 Jun 2004 74 KB WP-MFDDR Using Cyclone III FPGAs for Clearer LCD HDTV Implementation 1.0 Mar 2007 214 KB WP-01018-1.0 Using Cyclone III FPGAs for Emerging Wireless Applications 1.0 Mar 2007 683 KB WP-01017-1.0 Using FPGA-Based Channel Bonding for HDTV Over DSL 1.0 Feb 2008 152 KB WP-01053-1.0 Using Parity to Detect Memory Errors in Stratix Devices 1.2 Feb 2005 97 KB WP-STXPARITY-1.2 Using Pre-Emphasis and Equalization with Stratix GX 1.0 Sep 2003 2 MB WP-SGXEQUAL-1.0 Using Stratix GX Devices for SONET/SDH Backplanes 1.1 May 2004 193 KB WP-STXSNTSDH-1.1 Using Stratix II GX in HDTV Video Production Applications 2.0 Sep 2005 106 KB WP-STXGXDTVS-2.0 Using the Intel Flash Memory-Based EPC4, EPC8 & EPC16 Devices      EPC Programming File Conversion Utility (108 KB) 1.1 Oct 2005 228 KB WP-FMB1005-1.1 Using Zero-Power CPLDs to Substantially Lower Power Consumption in Portable Applications 1.1 Dec 2007 676 KB WP-01042-1.1 Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces 1.0 Nov 2007 812 KB WP-01034-1.0 Versatile Digital QAM Modulator 1.1 Jan 2006 586 KB WP-STXIIQAM-1.1 Video and Image Processing Design Using FPGAs 1.1 Mar 2007 488 KB WP-VIDEO0306-1.1 Video Surveillance Implementation Using FPGAs 1.1 Mar 2007 507 KB WP-VIDEOSRVL-1.1 PDF Legal Notice 给本页评分

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