Altera Home Page
文档资料 许可
在线购买 下载

  主页   |   产品   |   支持   |   最终市场   |   技术中心   |   教育与活动   |   公司介绍   |   在线购买  
  器件   |   设计软件   |   IP   |   设计服务   |   开发套件及配件   |   资料  

 高端 FPGA
      关于Stratix系列
   Stratix IV (E和GX)
   Stratix III (L和E)
   Stratix II (和GX)
   Stratix (和GX)
  
 中端FPGA
   Arria (GX)
  
 低成本FPGA
   Cyclone III
   Cyclone II
   Cyclone
  
 CPLD
   MAX II (和G, Z)
   MAX 3000A
  
 ASIC
      关于Hardcopy系列
   HardCopy IV (E和GX)
   HardCopy III
   HardCopy II
   HardCopy Stratix
  
 特殊市场供货
   无铅
      扩展温度标准
      工业温度
      军事温度
      汽车温度
  
 配置器件
   增强型配置器件
   串行配置器件
  
 成熟器件
      产品列表
  

Classic Device Family

The Classic™ device provides 300 to 900 usable gates with propagation delay speeds as low as 10ns and internal counter rates as high as 100MHz.

Table 1 outlines the highlights of the Classic device family.

classic chip
Table 1. Classic Device Feature Highlights
Feature Benefit
300 to 900 usable gates Multiple density options
16-macrocell, 22-pin devices to 48-macrocell, 68-pin devices Pin-to-pin logic ratios for a wide variety of uses
100% transistor-to-transistor logic (TTL) emulation Easy integration of multiple PAL- and GAL-type devices
Single arrays of globally connected logic Low-cost solution for low-density applications
"Zero-power" mode: draws microampere of current at standby Ideal for low-power applications

Related Links

  请填写反馈意见
  注册索取最新邮件通知