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主页 > 产品 > 开发套件及配件 > Altera 开发包 > Stratix III FPGA Development Kit 打印此页 订阅电邮新闻 Stratix III FPGA Development Kit from Altera Corporation The Stratix® III FPGA Development Kit delivers a complete environment for the development and testing of designs requiring high-performance and high-density devices. Altera® Stratix III FPGAs combine the world's highest performance and highest density with the lowest possible power consumption. You'll find Stratix III FPGAs provide the high-performance and high-integration capabilities needed for next-generation basestations, network infrastructure, and advanced imaging equipment. Ordering Information High-Speed Mezzanine Card Interface   Development Kit Contents Available Documentation Stratix III FPGA Development Kit Ordering Information Table 1. Stratix III FPGA Development Kit Ordering Code and Pricing Information Ordering Code Price Ordering Information DK-DEV-3SL150N $2,495 Contact your local Altera distributor to place your order. High-Speed Mezzanine Card Interface Altera developed the specification for the high-speed mezzanine connector (HSMC) interface, which is based on the Samtec mechanical connector, to define and standardize the interface between optional daughtercards and host boards. This specification outlines both the electrical and mechanical properties of the interface between daughtercard and host. You can also create your own HSMC interface compatible daughtercards. Request a copy of the HSMC specification  Stratix III FPGA Development Kit Contents The Stratix III FPGA Development Kit is RoHS compliant and includes: Stratix III development board Stratix III EP3SL150F1152 high-performance FPGA 142,500 equivalent logic elements (LEs) 744 user I/O pins 384 18 x 18 multipliers Clocking 125.000-MHz oscillator 50.000-MHz oscillator SMA input SMA output Configuration MAX® II  flash passive serial configuration circuit MAX II EPM2210GF256C3N CPLD 2,210 LEs 272 user I/O pins 8 Kbytes of user flash memory On-board USB-BlasterTM using Quartus® II development software programming JTAG download port General user input/output Power consumption display Displays each power rail individually System reset pushbutton Board-specific DIP switch JTAG bypass DIP switch User reset pushbutton User pushbuttons (x4) User DIP switch (x8) User LEDs (x8) User quad 7-segment display 128 x 64 dot pixels graphics display LCD (16 character x 2 line) Memory devices 128-Mbyte DDR2 SDRAM DIMM 16-Mbyte DDR2 SDRAM devices (individually addressable) 36-Mbit QDRII SRAM device 4-Mbyte PSRAM  64-Mbyte flash memory Components and interfaces USB 2.0 10/100/1000 Ethernet Two HSMC interfaces Power supplies 12A DC/DC µModule - LTM4601EV 1.5A low input voltage VLDO linear regulator - LTC3026EDD 100-mA, low noise, LDO micropower regulators in SOT-23 - LT1761ES5-SD 4.5A, 500-kHz step-down switching regulator - LT1374CFE 1.2-MHz/2.2-MHz inverting DC/DC converters in ThinSOT - LT1931AES5 1-/2-channel 24-bit µPower no latency delta-sigma ADC in MSOP-10 - LTC2402CMS Quartus II Development Kit Edition software, including a one-year license Cable and accessories   External AC adapter power supply Power cord (including support for UK, Europe) Available Documentation Table 2. Documents Available for the Stratix III FPGA Development Kit Document File Format Download Language User Guide Adobe PDF Via FTP English Reference Manual Adobe PDF Board Assembly Adobe PDF Board Mechanicals Adobe PDF Board Schematic Adobe PDF Bill of Materials Microsoft Excel Related Links Literature for Stratix III FPGAs  Stratix III DSP Development Kit Power Management Center for Altera devices 给本页评分

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