HDLC
The high-level data link controller (HDLC) protocol ensures the error-free movement of data between network nodes. It also provides the flow control to ensure that data is transmitted only as fast as the receiver can receive it. AMPPSM partners take advantage of the abundant TriMatrix™ memory resources available for on-chip storage in our Stratix™ devices to implement highly efficient single-channel and multichannel HDLC cores.
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试用 OpenCore |
AMPP Approved, SOPC Builder Ready |
Cyclone II, Stratix II, Cyclone, Stratix |
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试用 OpenCore |
AMPP Approved |
Cyclone II, Stratix II, Cyclone, Stratix |
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文档资料
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