HDLC-4K
Features
- Standards-compliant high-data level control (HDLC) core
- Scalable to 4,096 channels
- 8-bit physical link interface designed for easy interfacing to off-the-shelf framers
- Modelware's flexible PluriBus system interface allows easy connection to data FIFO buffers, direct memory access (DMA) controllers, and POS-PHY interface cores
- Flexible control inputs with options for internal/external hardwiring and access via a generic microprocessor interface
- ASIC and FPGA support
- Flag detection and generation
- Abort detection and insertion
- Zero-bit stuffing and de-stuffing
- Selectable transparent mode
- Selectable frame filtering based on programmable 8- or 16-bit address field, programmable 8- or 16-bit control field, programmable 8- or 16-bit protocol field
- Selectable frame header insertion (up to 6 programmable octets)
- Selectable 16-bit, 32-bit, or no cyclical redundancy check (CRC) generation and monitoring
- CRC error generation
- Selectable, programmable minimum interframe spacing
- Programmable interframe time fill
- Supports shared flags
- Supports statistics counters for received frames, received short frames, received long frames, received CRC-errored frames, received aborted frames, transmitted frames, and transmitted frames aborted
Block Diagram
Figure 1. Modelware's HDLC-4K Core
 View full detail (56 KB)
Description
The nAccess HDLC-4K Foundation core implements the HDLC protocol functions for both receive and transmit directions, for up to 4,096 channels. The HDLC-4K Foundation core interfaces to the user section via Modelware's PluriBus interface, allowing it to be used in wide range of applications.
Device Utilization and Performance
Table 1 lists the typical device utilization results for the megafunction.
| Table 1. Typical Device Utilization for the Megafunction |
| Target Device |
Speed Grade |
Utilization |
Performance
(fMAX) |
Parameter Setting |
| I/O Pins |
Logic Elements (LEs) |
Embedded System Blocks (ESBs) |
| EP1C12F324 |
-6 |
183 |
2,028 |
5 M4K blocks |
138 MHz |
Channels = 8
CrcEnb = 1
CrcLength = 0
HeaderData = 0
HeaderLength = 0 |
| EP1S10F484 |
-5 |
246 |
2,197 |
49 M4K blocks, 1M-RAM block |
122 MHz |
Channels = 4096
CrcEnb = 1
CrcLength = 0
HeaderData = 0
HeaderLength = 0 |
Contact Information
For additional information, contact Modelware:
Modelware (USA)
10 West Bergen Place
Suite 105
Red Bank, NJ 07701
Tel. (732) 936-1808
Fax (732) 936-1839
E-mail: altera@modelware.com
URL: www.modelware.com
Modelware (Europe)
Kuechel str. 14
96047 Bamberg, Germany
Tel: +49 951 299-9870
Fax: +49 951 299-9872
Email: altera@modelware.com
URL: www.modelware.com
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