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Dual Resampler 4Y

from CommStack, Inc.

Request Free Evaluation



AMPP Approved
OpenCore Support
DSP Builder Ready



Features

  • General-purpose interpolator / decimator
  • Arbitrary (even time-varying and non-integer) input / output sample rate ratios
  • Optimized for 10-bit input and output data path word widths (others on request)
  • Designed for maximum speed (fMAX > 140 - 300 MHz, depending on device family)
  • Optimized for ACEX™  1K, FLEX® 10KE, APEX™  20KE, APEX 20KC, and Mercury™ devices
  • Ideal for the following applications:
    • Digital modulators/demodulators
    • Wireless & wired telecommunications systems

Block Diagram

Figure 1 shows the block diagram for the megafunction.

Block Diagram

Description

CommStack's Dual Resampler 4Y megafunction resamples a complex digital baseband signal, generating a complex output sequence at a rate either a higher or lower than the complex input sequence. This is the major difference between the Dual Resampler 4Y and Dual Resampler 1Y megafunctions: the 4Y expects four time samples on each of the input channels for each CLK1 period, whereas the 1Y expects only one sample. Other input oversample ratios relative to CLK1 may be provided on a customized basis.

While many interpolators and decimators operate only at fixed integer input-to-output sampling rate ratios 1:N, and more complicated multi-rate (interpolate / decimate) schemes are often used just to obtain fixed integer-fractional ratios M:N, CommStack's Resampler megafunctions offer much greater flexibility in a smaller footprint. CommStack's designs support not only fixed integer and fixed integer-fractional ratios, but arbitrary non-fixed ratios Y, as well, where Y may even be time-varying (e.g., to adjust output versus input phase continuously, or to change input and/or output sampling rates on-the-fly, even by non-integer ratios.

This function may be used as the final stage of digital modulator designs, or as the stage just prior to an up converter, e.g., in DOCSIS, LMDS, or MMDS applications. The input signal may be in any of a variety of formats, including AM, BPSK, QPSK, GMSK, 8-PSK, OFDM, or 16- to 256-QAM. The Resampler 4Y megafunction may also be utilized in digital demodulator designs, typically as the stage just following the down converter.

The datapath is optimized for 10-bit inputs and outputs, but other datapath word widths may be implemented on a customized basis at nominal cost. Additional precision is implemented internally in order to maintain 10-bit accuracy in the result.

With output sample rates of 140 Mbps to over 300 Mbps, depending on device family, CommStack's Dual Resampler 4Y megafunction provides a high-speed and flexible interpolator / decimator capability well suited to many modern digital signal processing applications.


Device Utilization Examples

Table 1 lists the typical device utilization results for the megafunction.

Table 1: Typical Device Utilization for Megafunction
Device Speed Grade Logic Cells EABs (1) fMAX (typical)
EP1K100,
EPF10K100E
-1 956 1 144 MHz
EP20K100E -1 953 1 178 MHz
EP20K100C -7 953 1 215 MHz
EP1M120 -5 991 1 311 MHz

Note:
  1. EABs = Embedded array blocks
Contact Information

For additional information, contact

CommStack, Inc.
72 Fairfax Avenue
Atherton, CA 94027

Phone: (650) 701-0939
E-mail: info@commstack.com
Internet: http://www.commstack.com  

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