加密与解密
As secure communication data rates increase, software implementation of key data encryption algorithms becomes a major system bottleneck. To make matters worse, standard off-the-shelf application-specific standard products (ASSPs) and digital signal processors are failing to keep pace with the computational demands of data encryption algorithms.
Altera offers a variety of encryption and decryption intellectual property (IP) cores such as DES and AES. These cores are optimized for Altera® FPGA families and offer significant performance and cost advantages over competing solutions.
|
|
|
|
|
|
 |
试用 OpenCore |
AMPP Approved |
Stratix III, Cyclone III, Cyclone II, Stratix II, Stratix |
|
|
试用 OpenCore |
AMPP Approved |
Stratix III, Stratix II GX, Stratix II, Stratix |
|
|
试用 OpenCore |
AMPP Approved |
Stratix III, Stratix II GX, Stratix II, Stratix |
|
|
试用 OpenCore |
AMPP Approved, DSP Builder Ready |
Stratix, Excalibur, APEX 20KE, APEX 20KC |
|
文档资料
> 
