Filtering Reference Design Lab
Introduction
The filtering reference design lab provided in the DSP Development Kit, Stratix™ Edition, and the DSP Development Kit, Stratix Professional Edition shows you how to use the Altera® DSP Builder tool for system design, simulation, and board-level verification. DSP Builder is a digital signal processing (DSP) development tool that interfaces The MathWorks' industry-leading system-level DSP tool Simulink with the Altera Quartus® II design software. DSP Builder provides a seamless design flow in which users can perform algorithmic design and system integration in the MATLAB and Simulink software and then port the design to hardware description language (HDL) files for use in the Quartus II software.
Users can also use DSP Builder to generate a register transfer level (RTL) design and an RTL testbench from Simulink automatically. These files are pre-verified RTL output files that are optimized for use in the Altera Quartus II software for rapid prototyping. The built-in DSP Builder SignalTap® II analysis block allows users to capture signal activity from internal Stratix device nodes while the system under test runs at speed in hardware. This development flow is easy and intuitive even if users do not have extensive experience designing with programmable logic design software.
The lab uses the following items:
- Altera NCO Compiler MegaCore® function
- Altera FIR Compiler MegaCore function
- DSP Builder with the SignalTap II logic analyzer read-back feature
- ModelSim-Altera, or ModelSim PE, or ModelSim SE version 5.6 software
- Quartus II software version 2.2
- Stratix EP1S25 or EP1S80 DSP development board
Technical Support
Technical support on this reference design is available via the Altera mySupport on-line issue tracking system. Users can also search for related topics in the Find Answers database.
Related Links
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