Digital Modulator
Features
- Optimized for the Altera APEXTM 20K and FLEX® 10K device architectures
- Parameterized complex multiplier/mixer
- Parameterized quadrature output numerically controlled oscillator (NCO)
- Configurable phase accumulator within the NCO
- Configurable phase offset input port
- Applications:
- Amplitude modulation (AM)
- Frequency modulation (FM)
- Phase modulation (PM)
- Down converters
- Direct digital synthesis
Block Diagram
Figure 1 shows the block diagram for the digital modulator megafunction.
| Figure 1. Block Diagram |
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Description
The digital modulator megafunction from Nova Engineering contains a parameterized complex multiplier/mixer and quadrature output NCO. The NCO is a look-up table (LUT) that has a quadrature output, phase accumulator, and phase offset input port. The complex multiplier/mixer multiplies two user-defined inputs with the NCO outputs for amplitude modulation or frequency down conversion.
The NCO contains sine and cosine LUTs that generate digital sine and cosine waveforms at a periodic rate. The LUTs perform the following functions: F1[n] = sin{2 n/N]
F2[n] = cos[2n/N]
where: n = Address input to the LUT
N = Number of samples in the LUT
F1[n] = Amplitude of sine wave at [2n/N]
F2[n] = Amplitude of cosine wave at [2n/N]
Incrementing n from 0 to N causes the LUT to output one complete cycle of amplitude values for the sine and cosine functions. The value 2n/N represents a fractional phase angle between 0 (n = 0) and 2(n = N). The time (t) required to increment n from 0 to N, is the period of the sine and cosine waveforms produced by the NCO. Moreover, an m-bit phase input generates the addresses for the quadrature NCO. The LUT address increments once each system clock cycle by an amount equal to the phase input. The LUT address, or phase angle, is accumulated and stored in the phase accumulator register. The register’s output is used to address the sine and cosine LUTs.
The frequency (f) of the system clock (fCLOCK) is fixed. Therefore, the frequency of the sine and cosine waves produced by the NCO is:
f = 1/T = (fCLOCK x phase) / 2(m+1)
where: phase = Input phase angle
The phase_offset input modulates the NCO phase angle. The value from the phase_offset input is summed with the phase accumulator output. Both values, as well as the sum, are represented in two’s complement format.
The complex multiplier/mixer can multiply two complex numbers represented in two’s complement format. It uses a parallel-pipelined architecture that provides maximum speed. The complex multiplier/mixer performs the following function:
The total latency of the modulator from the phase input to the real output is 6 clock cycles. The output of the complex multiplier/mixer is registered to improve speed without increasing the number of logic cells used.
Device Utilization Example
Table 1 lists the typical device utilization results for the megafunction.
| Table 1. Typical Device Utilization for the Megafunction |
| Device |
Speed Grade |
Utilization |
Performance
(fMAX) |
Parameter Setting |
| Logic Cells |
EABs Note (1) |
| EPF10K50V |
-1 |
674 |
2 |
71 MHz |
24-bit accumulator, 10-bit phase offset, 8-bit complex multiplier, and 8-bit quadrature outputs |
Note:
- EABs = Embedded array blocks
Contact Information
For additional information, you can contact Nova Engineering, Inc. at: Nova Engineering, Inc.
5 Circle Freeway Drive
Cincinnati, OH 45246-1105
Tel. 513-860-3456
Fax 513-860-3535
E-mail: info@nova-eng.com
WWW: http://www.nova-eng.com
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