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主页 > 产品 > IP > 接口与外设 > Ethernet > Stratix II GX Gigabit Ethernet MAC 打印此页 发送此页 Stratix II GX Gigabit Ethernet MAC from Altera Corporation Developed by partnerMorethanIP, an independent IP provider specializing in Ethernet and related technologies, the Stratix® II GX Gigabit Ethernet MAC is available directly from Altera and fully supported as an Altera®IP megafunction. Now included in the IP Base Suite—FREE with Quartus®II subscriptions New in Version 1.1 SOPC Builder Ready optional Avalon® interface Maintenance release for use with the Quartus II software version 5.1 Service Pack 1 only Features Full-duplex Gigabit Ethernet media access controller (MAC) with integrated physical coding sub-layer (PCS) in Stratix II GX devices Stratix II GX device family support PCS Features: PCS frame encapsulation and decapsulation with /S/, /T/ ordered set insertion and termination and /I/ idle generation during inter-packet gaps 8b/10b encoding and decoding with running disparity for DC-balanced serial bit stream Comma detection and character alignment Link synchronization with carrier detection MAC Features: Implements the full IEEE 802.3 specification, including preamble/SFD generation, frame padding, and CRC generation and checking AtlanticTMinterface for data streaming applications, or SOPC Builder Ready with Avalon interface for memory-mapped systems Generates and appends CRC-32, or optionally forwards it from the application logic, provided the FCS is selectable on a per-frame basis CRC-32 checking at full-speed using a multi-stage CRC calculation, and optionally forwards the FCS field to the application logic Fully automated pause frame (802.3 Annex 31A) generation and termination, providing flow control without application logic intervention Supports all types of Ethernet frames (such as SNAP, LLC, IP), including unicast, multicast and broadcast Supports virtual local area network (VLAN)-tagged frames per IEEE 802.1Q and double VLAN tags (stacked VLANs) Programmable unicast MAC address with insertion and filtering Programmable promiscuous mode, accepting all unicast MAC frames regardless of the desitination MAC address Programmable maximum frame length, supporting all frame lengths, including 9K jumbo frames Programmable transmit inter-packet gap (IPG) for rate adaptation Optional 32-bit counters for IEEE 802.3 basic and mandatory management information database (MIB) package, RFC 2665 Ethernet MIB, and RFC 2819 remote network monitoring Programmable Atlantic FIFO buffer depth and threshold levels, ensure full 1 Gbps data rates with back-to-back frames Easy-to-use graphical user interface (GUI) to configure the IP megafunction and  testbench IP functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators Support for OpenCore® Plus evaluation Configurable Gigabit Ethernet frame generator and monitor testbench (VHDL and Verilog HDL) for the Gigabit media indepedent interface (GMII) and Atlantic interface Compliant with all applicable standards, including: IEEE 802.3, including Gigabit Ethernet MAC and 1000Base-X PCS Altera Corporation,Atlantic Interface Specification General Description The Stratix II GX Gigabit Ethernet MAC leverages the Stratix II GX embedded transceivers to provide a complete IEEE 802.3 Gigabit Ethernet MAC and PCS serial interconnect solution for chip-to-chip, board-to-board and backplane applications, as well as box-to-box interconnect with small-form pluggable (SFP) fiber optics. The Stratix II GX Gigabit Ethernet MAC implements all of the required features of the IEEE 802.3 specification with modest logic resource consumption, providing designers with the flexibility to implement the exact number of Gigabit Ethernet ports (from 1 to 20) required by their unique systems. Figure 1 shows a typical 10 Gbps line card using a Stratix II GX device for backplane interconnect, including the Stratix II GX Gigabit Ethernet MAC for control signaling to the host CPU. Figure 1. Stratix II GX Gigabit Ethernet MAC in a Control Plane Application Product Information Table 1 provides information about this release of the Stratix II GX Gigabit Ethernet MAC. Table 1.  Product Information Item Description Version 1.1 Release Date March 2006 Product ID 00AF(1) Vendor ID 6AF8 Note: Included in IP Base Suite licenses, which are FREE with Quartus II subscriptions Performance Table 2 shows the resources required and performance achieved for the Stratix II GX Gigabit Ethernet MAC using the Quartus II software version 5.1. Table 2.  Stratix II GX Gigabit Ethernet MAC Resource Utilization&Performance Device Family ALUTs Memory Performance (fMAX) M512 M4K MRAM Stratix II GX 1,500 5 0 0 140 MHz (1) Note: 125 MHz performance requirement achieved with margin in any size Stratix II GX FPGA in the slowest (-5) speed grade Technical Support For technical support on this IP megafunction, please visit theAltera mySupporton-line issue tracking system. You may also search for related topics on this function in theAltera Solutions Database. Related Documents Stratix II GX Embedded Gigabit Ethernet MAC/PHY User's Guide (Verilog) Stratix II GX Embedded Gigabit Ethernet MAC/PHY User's Guide (VHDL) Stratix II GX Embedded Gigabit Ethernet Media Access Controller Errata Sheet Stratix II GX Handbook 给本页评分

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