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主页 > 产品 > IP > 接口与外设 > I2C > I2CS Bus Controller Slave 打印此页 订阅电邮新闻 I2CS Bus Controller Slave from CAST, Inc. Features I2C bus uses two wires to transfer information between devices connected to the bus: a serial clock line (SCL) and a serial data line (SDA) I2CS bus controller performs serial transmission of up to 400 kHz for operation in standard mode and fast-speed mode In slave receiver mode, serial data and the serial clock are received through SDA and SCL In slave transmitter mode, serial data is transmitted via SDA while the serial clock is input through SCL Block Diagram Description The I2CS bus controller logic provides a serial interface that meets the Philips I2C bus specification and supports all slave transfer modes to and from the I2C bus. The I2CS logic handles byte transfers autonomously, tracks serial transfers, and a status register (i2cssta) reflects the status of I2CS bus controller and the I2C bus. The I2CS is a microcode-free design developed for reuse in application-specific integrated circuit (ASIC) and programmable logic applications. The design is strictly synchronous with positive-edge clocking, no internal tri-states, and a synchronous reset. Device Utilization & Performance Table 1 lists the typical device utilization results for the megafunction. Table 1. Typical Device Utilization for the Megafunction Target Device Speed Grade Utilization Performance Fmax Parameter Settings Logic Elements (1) Memory Cyclone™ 1C3 -6 387 - 200 MHz Contact CAST Stratix® 1S10 -5 385 - 205 MHz Contact CAST Stratix II 2S3 -6 369 - 296 MHz Contact CAST Note: The logic element count for Stratix II devices is based on the number of adaptive look-up tables (ALUTs) used for the design as reported by the Quartus® II software. Deliverables Encrypted Licenses Post-synthesis Altera hardware description language (AHDL) or electronic design interchange format (EDIF) netlist file Assignment and configuration file (.acf) Symbol file (.sym) Include file (.inc) Vectors for testing the functionality of the megafunction HDL Source Licenses Synthesizable VHDL or Verilog register transfer level (RTL) source code Self-checking testbenches Vectors for testbenches Simulation script Synthesis script Contact Information For additional information, contact CAST. Inc. at: CAST, Inc. 11 Stonewall Court Woodcliff Lake, NJ 07677 USA Phone: +1 (201) 391-8300 Fax: +1 (201) 391-8694 Email: info@cast-inc.com URL: http://www.cast-inc.com The I2CS megafunction is licensed from Evatronix S.A. 给本页评分

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