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System-Level Software

System-level software supports the following:

  • Hardware/software partitioning and co-simulation (see Table 1)
  • Device partitioning (see Table 2)
  • System-level software (see Table 3)
Table 1. Hardware/Software Partitioning and Co-Simulation
EDA Vendor Tool Name Description
Celoxica Nexus PDK System-level co-verification
Impulse Accelerated Technologies Impulse C CoDeveloper C language development system
Mentor Graphics® Platform Express Capture and verification tool
Seamless Hardware/software co-verification
Nucleus Real-time operating system
System Architect Performance modeling
Architecture
Hardware/software software exploration and partitioning
Synopsys CoCentric System Studio SystemC design
Verification tool suite
CoCentric Fixed-Point Algorithmic design tool
DesignWare SystemC Libraries System-On-A-Chip (SOC) design library
ModelSource 3000 Device modeling
Saber Mixed signal behavioral simulator


Table 2. Device Partitioning
EDA Vendor Tool Name Description
Celoxica DK Design Suite System-level co-design
Co-verification
Implementation for C, C++, and Handel-C
Mentor Graphics XRAY Debugging Debugging
Synplicity Certify ASIC prototyping with multi-FPGAs


Table 3. System Level Software
EDA Vendor Tool Name Description
Aldec Active HDL VHDL
Verilog
C/C++
EDIF
Celoxica DK design suite System-level co-design
Co-verification
Implementation for C, C++, and Handel-C
Impulse Accelerated Technologies Impulse C CoBuilder ANSI C translator
Mentor Graphics HDL Designer Series HDL environment managing complexity of FPGA design
Visual Elite High-level C/C++
SystemC functional modeling and verification
SynaptiCAD TestBencher Pro Graphical testbench generator
Synopsys DesignWare Library Intellectual property (IP) library
Module Compiler Datapath compiler

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