Altera Home Page
文档资料 许可
在线购买 下载

  主页   |   产品   |   支持   |   最终市场   |   技术中心   |   教育与活动   |   公司介绍   |   在线购买  
  器件   |   设计软件   |   IP   |   设计服务   |   开发套件及配件   |   资料  

 逻辑设计
   Quartus II 订购版
      Quartus II 网络版
      ModelSim-Altera
      新特性
  
 DSP设计
      DSP Builder
  
 入门
      FPGA & CPLD
      HardCopy ASIC
  
 转移至Quartus II
      ASIC用户
      MAX+PLUS II 用户
  
 合作伙伴
      EDA合作伙伴
      系统级软件
  
 订购与下载
      订购
      下载
      许可
  

[an error occurred while processing this directive]

EDA ACCESS Partner Profiles: Impulse Accelerated Technologies

Impulse Accelerated Technologies

Overview

Impulse C™ is a function library that simplifies the development of highly parallel algorithms and programs for Altera® FPGAs and other programmable platforms. Complete with a compiler and debug tools, Impulse C is compatible with standard ANSI C. Impulse C allows embedded systems designers and software programmers to take advantage of programmable and reconfigurable hardware for application acceleration.

Impulse C is distinct from other C-based synthesis front-ends in that it provides an efficient and flexible programming model for mixed processor and FPGA platforms. Impulse C is not a hardware description language (HDL) based on C; instead, it is a set of intrinsic functions and datatypes that allows applications written in standard C—the language of choice for embedded system designers—to be mapped efficiently onto coarse-grained parallel architectures that include standard processors along with programmable hardware elements.

The Impulse C tools include hardware/software co-simulation tools as well as proprietary C-to-RTL scheduling/optimizing technology used to map application elements to hardware via standard HDL synthesis tools. Impulse C tools operate within standard embedded programming environments including Metrowerks CodeWarrior, Visual Studio, and GCC. They are easily adaptable to other standard C/C++ or EDA development environments.

Tools

Table 1 lists design tools supporting Altera devices.

Table 1. Design Tools Supporting Altera Devices
Design Flow Tool Name Comments
System Level
Hardware/Software Partitioning and Co-Simulation Impulse C™ CoDeveloper

Includes Impulse C libraries for Visual Studio, Codewarrior or GCC integration, Application Manager, Application Monitor and CoBuilder scheduler, and RTL generator. Outputs synthesizable VHDL and Verilog. Automatically creates SOPC Builder interfaces for use with Altera Nios® II processors.

High-Level Design Tools Impulse C CoBuilder Translates algorithms expressed in ANSI C (with Impulse C intrinsic functions) to optimized RTL, ready for processing in standard FPGA synthesis tools. Performs instruction scheduling and pipelining, generates RTL appropriate for specific FPGA and programmable platform targets.

Contact Information

For additional information, contact Impulse Accelerated Technologies at:

Impulse Accelerated Technologies
550 Kirkland Way, Suite 200
Kirkland, WA 98033

Tel. (425) 605-9543 or toll free (866) 4impulse
Fax. (425) 605-9544
Email: info@ImpulseC.com
URL: www.ImpulseC.com

  请填写反馈意见