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主页 > 产品 > 设计软件 > 设计流程 > PLD设计 > Easiest to Use Design Software for CPLDs 打印此页 订阅电邮新闻 Easiest to Use Design Software for CPLDs Altera’s Quartus®  II software and the no-cost Quartus  II Web Edition software support MAX® II devices and other MAX CPLD device families with an easy-to-use and comprehensive design environment that can take CPLD design projects from start to finish (Figure 1). The Quartus II and Quartus II Web Edition software also integrate seamlessly with all of the leading third-party synthesis and simulation tools. Figure 1. Quartus II Software CPLD Design Flow Quartus II Advantages for MAX+PLUS II Users The Quartus II software is the highest performance and easiest-to-use software available for CPLD designs. With a built-in MAX+PLUS® II look-and-feel option (see Figure 2), MAX+PLUS II software users can get the full benefits of the advanced features and performance of the Quartus II software without having to learn a new interface. Figure 2. Quartus II Software's Built-In MAX+PLUS II Look-&-Feel Option Click for full detail (36 KB) In addition to the MAX+PLUS II software interface option, the Quartus II software offers some important advantages over the MAX+PLUS II software, as shown in Table 1. Table 1. Quartus II Advantages over MAX+PLUS II Software Design Method Supported Features Device Support Supports the MAX II family in addition to MAX 3000A, 7000AE, MAX 7000B, and MAX 7000S families Supports the latest FPGAs such as Cyclone™, Stratix™, and Stratix II devices Performance Offers better performance than the MAX+PLUS II software version 10.2 for MAX 3000A, MAX 7000AE, MAX 7000B, and MAX 7000S designs 15% faster average design performance Requires an average of 5% fewer device resources for a given design Synthesis Integrates RTL synthesis support for the latest VHDL and Verilog language standards in addition to AHDL support RTL viewer provides a graphical representation of  VHDL or Verilog designs before synthesis and design implementation (Quartus II software only) Supports all leading third-party synthesis flows Advanced Features Advanced features for supporting MAX II CPLDs and the latest FPGA device families PowerGauge™ power analysis (Includes support for the latest MAX CPLDs, coming soon for MAX II CPLDs) LogicLock™ block-based design flow (Now included for MAX II designs) SOPC Builder Easy integration of intellectual property (IP) Compilation Physical synthesis optimization Timing closure floorplan editor Verification features Multi-clock and multi-cycle timing analysis SignalTap® II embedded logic analyzer for FPGA designs Last-minute design change support (ECO support) Chip editor Incremental fitting Related Links Quartus II Web Edition Software Quartus II Software  给本页评分

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