SOPC Builder Design Flow & Features
The SOPC Builder system development tool allows system designers to create highly customized system-on-a-programmable-chip (SOPC) designs in a fraction of the time traditionally required. SOPC Builder, included with the Quartus® II design software, automatically generates the Avalon™ switch fabric that interconnects the components used in system-on-a-programmable-chip (SOPC) applications. SOPC Builder can trim months off a design cycle because it simplifies and accelerates design. It integrates complex system components such as intellectual property (IP) blocks, memories, microprocessors, and interfaces to off-chip devices including ASSPs and ASICs on Altera's high-density FPGAs.
SOPC Builder also saves designers time by automatically generating software to match the target hardware. Custom software development kits include header files, custom libraries (peripheral routines), and design-specific operating system (OS) kernels. A custom software development kit is generated for every processor in the system.
SOPC Builder enables designers to focus on the key components of their system and begin developing the applications sooner by eliminating the engineering time required for system integration.
Figure 1. SOPC Builder Design Flow
Figure 2 shows the SOPC Builder system contents interface. The interface allows users to access the SOPC Builder component library and modify active components of a custom-built system.
Figure 2. SOPC Builder System Contents View
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Read more about how SOPC Builder can help designers with:
Definition & Integration
SOPC Builder is a powerful development tool for system definition and component integration. The tool provides an intuitive graphical user interface (GUI) that simplifies the definition, customization, and verification phases of design. Users choose processors, memory interfaces, peripherals, bus bridges, IP cores, and other system components from an extensible SOPC Builder library. With SOPC Builder, designers select and parameterize IP from an extensive list of communication, digital signal processing (DSP), microprocessor, interface cores, and common microprocessor peripherals.
Altera® customers have immediate access to SOPC Builder Ready-certified MegaCore® functions and cores created by Altera AMPPSM partners. Designers can download these cores for evaluation and purchase from the IP MegaStore™ web site. OpenCore® and OpenCore Plus IP cores allow system designers to evaluate a megafunction prior to purchase. These cores appear as SOPC Builder library components. Figure 3 shows an example of a designer's IP component library in the SOPC Builder software.
Users can easily add their own custom IP blocks and peripherals to the SOPC Builder library component list. Refer to AN 333: Developing Peripherals for SOPC Builder for details.
Figure 3. SOPC Builder IP Component Library
Once users have added the components they want for their systems, they configure the base addresses, interrupt request priorities (IRQs), and similar hardware and software parameters all within the active components view. Figure 3 shows the table of active components, which are user-defined and -configured components within the specific system.
Figure 3. SOPC Builder Active Components View
After the user has defined an embedded system, SOPC Builder automatically generates the Avalon switch fabric that contains all the decoders, arbiters, data path, and timing logic necessary to bind the chosen processors, peripherals, memories, interfaces, and IP cores.
If a system contains multiple masters (e.g. two processors or a processor and a direct memory access (DMA) peripheral), SOPC Builder automatically generates slave-side arbitration technology to optimize multi-master system performance. More information on slave-side arbitration is available in AN 184: Simultaneous Multi-Mastering with the Avalon Bus.
Software Generation
While SOPC Builder is as a hardware-generation engine, it understands that embedded software designers require a complete and up-to-date software environment to develop applications for the custom-built hardware. SOPC Builder automatically produces a corresponding software environment to jump-start software development that includes some or all of the following:
- Header files
- Generic peripheral drivers
- Custom software libraries
In addition to convenience, this development environment promotes better design coherency between hardware and software engineers. With SOPC Builder, changes to the hardware are immediately reflected in the software development environment. Software engineers can start their application development earlier and continue development as new hardware is added to the system.
System Verification
In another effort to accelerate development time, SOPC Builder generates a top-level simulation testbench file and ModelSim® project files, setting up the simulation environment and adding signals identified by the SOPC Builder components to the simulation waveform viewer. Software code can be compiled with the rest of the project files and automatically placed into the memory models.
Altera customers also benefit from designing in a programmable logic environment. Altera FPGAs provide immediate prototyping capability. Designers can verify their system functionality at full system speed in real hardware and under real-world stimulus. Altera and its partners provide development boards that can accelerate prototyping and system verification.
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