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FLEX 10K Device Family Configuration
Configuration Scheme Overview
The FLEX 10K® family of FPGAs support the following configuration schemes:
- Serial - To Conserve Pins
- Passive Serial (PS)
- Uses an external intelligent host such as a PC, an enhanced configuration (EPC) device (PDF), or a microprocessor to control the configuration process synchronously and supply the configuration data serially to the FLEX 10K device.
- JTAG
- Configures FLEX10K devices via the IEEE Standard 1149.1 interface.
- Parallel - For Faster Configuration
- Passive Parallel Synchronous (PPS)
- Uses an external intelligent host, such as a PC or microprocessor, to control the configuration process synchronously and supply the configuration data in a parallel manor to the FLEX 10K device. Each configuration data byte requires eight
DCLK cycles. The configuration time using a PPS scheme is similar to the configuration time using a PS scheme provided the DCLK frequencies for both schemes are the same.
- Passive Parallel Asynchronous(PPA)
- Uses an external intelligent host, such as a PC or microprocessor, to control the configuration process asynchronously and supply the configuration data in a parallel manor to the FLEX 10K device.
How to Configure FLEX 10K Devices
- For Prototyping or Debugging
- Using Altera Programming Cables
- The Quartus® II programmer supports configuring FLEX 10K devices directly using PS or JTAG interfaces via Altera® programming cables.
- In the Field
Frequently Asked Questions
- Can I configure any FLEX 10KE device with a FLEX 10K or FLEX 10KA configuration file?
- Can JTAG configuration of a FLEX 10K device be verified?
- How do I calculate the configuration time required for FLEX 10K or FLEX 10KA devices in PPA mode?
- What should I do with the FLEX 10K or FLEX 10KA
DEV_CLRN and DEV_OE input pins during configuration?
- What is the difference between the EPC1 configuration device and the EPC1213 and EPC1064 configuration devices?
- How can I configure FLEX 10K devices via the JTAG port or pins?
- Can the
DATA0 pin be used as an I/O pin in user mode for FLEX 10K designs?
- Why can't I configure a chain of FLEX 10K devices with more than two EPC1 configuration devices?
- What is the state of the I/O pins on APEXTM 20K, APEX 20KE, FLEX® 6000, FLEX 8000, FLEX 10K, FLEX 10KE, and ACEX® 1K devices after power-up and before configuration?
- Can I use an Atmel configuration device to configure my FLEX 10K device?
- What configuration device should I use to configure FLEX 10KA devices?
- Can I use an EPC1 to configure two FLEX 10K devices with one FLEX 10K device's
VCCIO at 3.3 V and the other FLEX 10K device's VCCIO at 5.0 V?
- Can I configure multiple FLEX devices using the BitBlasterTM or the ByteBlasterTM cable?
- If I am only configuring one FLEX 10K, APEX, ACEX or Mercury™ device, what should I do with the
nCEO configuration pin?
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