Stratix II/Stratix II GX Device Fast Passive Parallel Configuration

Fast Passive Parallel Configuration

To meet the continuously increasing demand for faster configuration times, Stratix^® II/Stratix II GX devices offer fast passive parallel (FPP) configuration. Stratix II devices are designed with the capability of receiving byte-wide configuration data every clock cycle.

Configuration Methods in Fast Passive Parallel Mode

• Using an enhanced configuration (EPC) device
• Using a microprocessor
• Using a MAX^® II device as an external host

For more information, please refer to the Configuring Stratix II & Stratix II GX Devices chapter in the Configuration Handbook.

Embedded Solution

• Configuring the MicroBlaster^TM FPP Software Driver
  • Portable software driver used to configure an FPGA via a FPP interface
  • Source code available for porting to an embedded or other platform

Reference Design

• MAX Series Configuration Controller Using Flash Memory
  • Using a MAX or MAX II device as a configuration controller to configure Altera^® FPGAs from flash memory
  • Source code in Verilog and VHDL

Related Literature

• Altera Configuration Devices
• Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet