DSP Builder: Complex Multiplier With Variable Coefficients Using Canonical Representation
This example describes an 18 x 18 signed complex multiplier design in DSP Builder. The complex multiplier is implemented using dedicated DSP Blocks and supports variable coefficients. The design example uses the canonical representation for complex multiplication requiring three multipliers, three adders, and two subtractors:
D = Dr + j*Di { Data }
C = Cr + j*Ci { Coefficient }
R = D*C = Rr + j*Ri { Result }
Rr = Dr*Cr – Di*Ci {same as conventional representation}
Rr = Dr*Cr – Di*Ci + (Dr*Ci - Di*Cr) - (Dr*Ci - Di*Cr)
Rr = (Dr*Cr – Dr*Ci + Di*Cr - Di*Ci) + (Dr*Ci - Di*Cr)
Rr = ((Dr + Di)*(Cr - Ci)) + (Dr*Ci - Di*Cr)
Ri = Dr*Ci + Di*Cr {same as conventional representation}
Download the files used in this example:
The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.
Files in the zip download include:
- complex_mult_C_DSP_Block.mdl—DSP Builder design file implementing 18x18 complex multiplier with variable coefficients
- init.m—MATLAB script to initialize the sampling time, and simulation time
- complex_mul.m—MATLAB script to verify the simulation results in Simulink
Figure 1 shows the top-level diagram of the complex multiplier design example in DSP Builder.
Figure 1. Signed 18x18 Complex Multiplier Top-Level Diagram
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Table 1 lists the ports and gives a description for each.
| Table 1. Signed Complex Multiplier Port Listing |
| Port Name |
Type |
Description |
DataInI[17:0], DataInQ[7:0] |
Input |
18-bit data inputs to complex multiplier unit |
CoefReal[17:0], CoefImag[17:0] |
Input |
18-bit coefficients to complex multiplier unit |
ResI[36:0], ResQ[36:0] |
Output |
37-bit data output of complex multiplier unit |
Related Links
For more information on related features used in this design example in your project, go to:
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