18-Tap Complex Finite Impulse Reponse FIR Filter
This design example describes an 18-tap complex finite impulse response (FIR) filter in DSP Builder. The design uses the canonical representation for complex multiplication requiring three multipliers, three adders, and two subtractors per complex multiplier. The multipliers are implemented using dedicated DSP Blocks.
Data & Coefficient
D = Dr + j*Di
C = Cr + j*Ci
Result
R = D*C = Rr + j*Ri
Conventional Representation
Rr = Dr*Cr – Di*Ci
Ri = Dr*Ci + Di*Cr
Canonical Representation
Rr = Dr*Cr – Di*Ci {same as conventional representation}
Rr = Dr*Cr – Di*Ci + (Dr*Ci - Di*Cr) - (Dr*Ci - Di*Cr)
Rr = (Dr*Cr – Dr*Ci + Di*Cr - Di*Ci) + (Dr*Ci - Di*Cr)
Rr = ((Dr + Di)*(Cr - Ci)) + (Dr*Ci - Di*Cr)
Ri = Dr*Ci + Di*Cr {same as conventional representation}
Download the files used in this example:
The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.
Files in the .zip download include:
- complex_fir.mdl—DSP Builder design file implementing complex FIR filter with 18 taps (complex coefficients)
- init.m—MATLAB script to initialize the sampling time, simulation time and coefficient values
Figure 1 shows the top-level diagram of the complex FIR filter design example in DSP Builder.
Figure 1. Complex FIR Filter Top-Level Diagram
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Table 1 lists the ports and gives a description for each.
| Table 1. Complex FIR Filter Port Listing |
| Port Name |
Type |
Description |
DataIn_I[17:0], DataIn_Q[7:0] |
Input |
18-bit real and imaginary data input |
Result_I[17:0], Result_Q[17:0] |
Output |
18-bit real and imaginary filter result output |
Related Links
For more information on related features used in this design example in your project, go to:
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