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DSP Builder: Half-Band Filter With Reloadable Coefficients

The design example describes an interpolation by two half-band filter with 79 taps (40 none-zero coefficients). Taking advantage of the symmetrical filter coefficients and the concept of time-domain multiplexing (TDM), the design requires only 10 multipliers. The multipliers are implemented using distributed arithmetic (DA) where the partial products are stored in the M4K TriMatrix memory blocks. The design also supports reloading of the filter coefficients. 

The coefficients are stored as partial products in the M4K TriMatrix memory blocks. The M4K memory blocks are configured as 128x32 dual-port RAMs. To reload a new coefficient set, assert the coef_reload bit and keep it high throughout the entire reload period. The partial products for the coefficients need to be pre-computed. Refer to the compute_partial_product.m script for details. While reloading the coefficients, the filtering operation is halted.

Download the files used in this example:

The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.

Files in the zip download include:

  • HBF_DA_TDM_Reloadable_Coef.mdl—DSP Builder design file implementing the interpolating half-band filter with reloadable coefficients
  • init.m—MATLAB script to initialize the sampling time, and simulation time and coefficients. The script also generates the stimuli: chirp and impulse.
  • compute_partial_product.m—MATLAB script to calculate the partial products based on the initial filter coefficient values set in init.m. Two sets of partial products are calculated for each coefficient value: one for the MSB segment and the other for the LSB segment of the data. Since the design uses TDM, each LUT stores the partial product for two coefficients. 

Figure 1 shows the top-level diagram of the half-band filter design example in DSP Builder.

Figure 1. Half-Band Filter Top-Level Diagram

Figure 1. Half-Band Filter Top-Level Diagram
View Full Size

Table 1 lists the ports and gives a description for each.

Table 1. Half-Band Filter Port Listing
Port Name Type Description
input_data[17:0] Input 18-bit data inputs to complex multiplier unit
clken Input Clock enable
coef_reload Input Assert high to reload new filter coefficients
coef_pp[23:0] Input 24-bit partial products are pre-computed based on the new coefficient set.  Used during coefficient reloading
FirResult[18:0] Output 19-bit data output of filter

Related Links

For more information on related features used in this design example in your project, go to:

Design Examples Disclaimer

These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.

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