Graphic Editor: Cycle-Shared Dual-Port RAM (csdpram)
This example implements a dual-port RAM block with two inputs
that are 4 bits wide and 16 words deep. You can change the width
(LPM_WIDTH) and depth (LPM_WIDTHAD)
parameters as needed for your design.
If you are using this function in a FLEX 10K design, MAX+PLUS II can implement the RAM in
embedded array blocks (EABs).
Download the Graphic Editor file used in this example:
cycle.gdf
For more information on using this example in your project, go to:
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Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.
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