Altera Home Page
文档资料 许可
在线购买 下载

  主页   |   产品   |   支持   |   最终市场   |   技术中心   |   教育与活动   |   公司介绍   |   在线购买  
  mySupport   |   器件   |   软件   |   IP   |   设计范例   |   参考设计  

 产品
      MAX/MAX II
      Stratix/Stratix GX
      Nios II
  
 功能
      算法
      存储器
      总线及I/O
      逻辑
      接口与外设
      DSP
      通信
      PLL & Clocking
  
 设计输入方法
      Quartus II软件工程
      Tcl
      VHDL
      Verilog HDL
      C Code 范例
      DSP Builder
      TimeQuest
   片内调试
  
 仿真工具
      Mentor Graphics ModelSim
      Cadence NCsim
      Synopsys VCS
  
 旧范例
      图形编辑器
      AHDL
  

Linear Feedback Shift Register

This example instantiates a linear feedback shift register that provides a high-speed counter. Some performance attributes are sacrificed in order to gain the high-speed functionality.

The linear feedback shift register counts through 2^WIDTH-1 states. A state consisting of only 1s is illegal; if the counter contains all 1s, it cannot leave that state unless the counter is cleared or another value is loaded. The maximum width of fast_cnt is 16 so the maximum number of states it can count to is 65535.

The states of the counter are not sequential and the states change depending on the specified counter width. For example, in the Graphic Editor file shown below, the width is set to 4, so the counter goes through the following 15 states: 0000, 0001, 0011, 0111, 1110, 1101, 1011, 0110, 1100, 1001, 0010, 0101, 1010, 0100, and 1000. If the width is set to a different value, then the counter will go through a different sequence of states.

This design should be targeted for a FLEX device. Although it has certain drawbacks when compared to other counters, it will run much faster than an lpm_counter of the same width in a FLEX device.

The Graphic Editor and AHDL files for this example are provided below.

To download the Graphic Editor file, click on the link below with the right mouse button and choose Save Link As from the drop-down list box.

For more information on using this example in your project, go to:
top.gdf
top.gdf
fast_cnt.tdf

INCLUDE "lpm_xor.inc";


PARAMETERS
(
   WIDTH
);

SUBDESIGN fast_cnt
(
   data[WIDTH-1..0]       : INPUT = GND;
   clock                  : INPUT;
   clk_en                 : INPUT = VCC;   -- Clock Enable
   load, aclr             : INPUT = GND;
   q[WIDTH-1..0]          : OUTPUT; 
)

VARIABLE
   counter[WIDTH-1..0] : DFFE;
   
BEGIN
   ASSERT (WIDTH > 1 )
      REPORT "Value of 'Width' must be greater than 1"
      SEVERITY ERROR;

   ASSERT (width <= 16)
      REPORT "Value of 'Width' must be equal to or less than 16"
      SEVERITY ERROR;

   counter[].clk = clock;
   counter[].clrn = !aclr;
   counter[].ena = clk_en;
   
   IF (WIDTH == 2) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter1 = counter0;
      counter0 = counter0 XNOR counter1;
      END IF;
   END GENERATE;
    IF (WIDTH == 3) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[2..1] = counter[1..0];
      counter0 = counter2 XNOR counter1;
      END IF;
   END GENERATE; 
   IF (WIDTH == 4) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[3..1] = counter[2..0];
      counter0 = counter2 XNOR counter3;
      END IF;
   END GENERATE;
   IF (WIDTH == 5) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[4..1] = counter[3..0];
      counter0 = counter4 XNOR counter2;
      END IF;
   END GENERATE;
    IF (WIDTH == 6) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[5..1] = counter[4..0];
      counter0 = counter5 XNOR counter4;
      END IF;
   END GENERATE;
   IF (WIDTH == 7) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[6..1] = counter[5..0];
      counter0 = counter6 XNOR counter5;
      END IF;
   END GENERATE;
   IF (WIDTH == 8) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[7..1] = counter[6..0];
      
      !counter0 = lpm_xor(counter7, counter5, counter4, counter3) 
               with (LPM_WIDTH = 1, LPM_SIZE = 4);
      END IF;
   END GENERATE;
   IF (WIDTH == 9) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[8..1] = counter[7..0];
      counter0 = counter8 xnor counter4;
      END IF;
   END GENERATE;
   IF (WIDTH == 10) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[9..1] = counter[8..0];
      counter0 = counter9 XNOR counter6;
      END IF;
   END GENERATE;
   IF (WIDTH == 11) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[10..1] = counter[9..0];
      counter0 = counter10 XNOR counter8;
      END IF;
   END GENERATE;
   IF (WIDTH == 12) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[11..1] = counter[10..0];
      
      !counter0 = lpm_xor (counter11, counter10, counter7, counter5) 
               WITH (LPM_WIDTH = 1, LPM_SIZE = 4);
      END IF;
   END GENERATE;
   IF (WIDTH == 13) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[12..1] = counter[11..0];
      
      !counter0 = lpm_xor (counter12, counter11, counter9, counter8)
               WITH (LPM_WIDTH = 1, LPM_SIZE = 4);   
      END IF;
   END GENERATE;
   IF (WIDTH == 14) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[13..1] = counter[12..0];
      
      !counter0 = lpm_xor (counter13, counter12, counter7, counter3)
               WITH (LPM_WIDTH = 1, LPM_SIZE = 4);   
      END IF;
   END GENERATE;
   IF (WIDTH == 15) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[14..1] = counter[13..0];
      counter0 = counter14 XNOR counter13;
      END IF;
   END GENERATE;
   IF (WIDTH == 16) GENERATE
      IF load THEN counter[] = data[]; ELSE
      counter[15..1] = counter[14..0];
      
      !counter0 = lpm_xor(counter15, counter14, counter12, counter3) 
               WITH (LPM_WIDTH = 1, LPM_SIZE = 4);
      END IF;
   END GENERATE;
   
	q[] = counter[];
END;

Feedback

Did this information help you?

If not, please log onto mySupport to file a technical request or enhancement.


Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.

  请填写反馈意见
  注册索取最新邮件通知