Quartus II Design Examples: Examples for altmult_add Megafunction
The altmult_add Megafunction User Guide provides two design examples to implement a complex multiplier and a finite impulse response (FIR) filter. These two design examples use the MegaWizard® Plug-In Manager in the Quartus® II software. The steps to generate the megafunction using the MegaWizard Plug-In Manager are described in detail in the User Guide.
Example 1: Complex Multiplier
The design example illustrates the use of the altmult_add megafunction to implement a complex multiplier. Consider the complex multiplication of (A0 + iA1) x (B0 + iB1). This expression can be expanded to (A0xB0 - A1xB1) + i(A0xB1 + A1xB0). To implement this, two multiplier/adder functions are required: one for the real expression and one for the imaginary expression.
In this example, you do the following:
- Create a complex multiplier using the
altmult_add megafunction and the MegaWizard Plug-in Manager
- Implement the design and assign the EP1S10F780C5 device to the project
- Compile and simulate the design
Figure 1: Complex Multiplication
Select for larger view
The following design files are used in this example:
- The Quartus II project archive
- README file
The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.
Example 2: FIR Filter
This design example uses the altmult_add megafunction to implement a serial FIR filter in the form of,
N-1
y(t) = ∑ A(t - i )B( i )
i-0
Where N = number of taps, and
A(t) represents the sequence of input samples, and
B(i) represents the filter coefficients
This example implements a simple FIR filter with N=4 which is called a 4-tap filter. The number of taps (N) could be any value, but this example shows the FIR filter with four taps. To implement this filter, the coefficients of data B is loaded into the B registers in parallel and a shiftin register moves data A(0) to A(1) to A(2) and so on. With a 4-tap filter, at a given time [t], the sum of four products is computed. This function is implemented using the shift register chain option in the altmult_add megafunction. In this example, input B represents the coefficients and data A represents the data that is shifted in. The A input, “data,” will be shifted in with the main clock, “clock0.” The B input, “coefficients,” is loaded with “clock1” rising edge and enable signal held high.
In this example, you do the following:
- Create a FIR filter using the
altmult_add megafunction and the MegaWizard Plug-in Manager
- Implement the design and assign the EP1S10F780C5 device to the project
- Compile and simulate the design
The following design files are used in this example:
- The Quartus II project archive
- README file
The use of this design is governed by, and subject to, the terms and conditions of the Altera Hardware Reference Design License Agreement.
Design Examples Disclaimer
These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.
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