Tcl Script: Test Bench Command Line Tcl Script Example
This Tcl script example opens the attached project counter, sets the simulation inputs using a Tcl testbench, and outputs the results of the simulation to either a file or the screen. The design project is a 4-bit counter with a clk and an aclr input port, and a q and cout output port.
You need to run the script from the MS_DOS prompt, after you change the directory path to the project's home directory. To run the script, use the following command:
quartus_cmd -f counter.tcl
To record the simulation messages and results into a file instead of displaying them on the screen, use the following command:
quartus_cmd -f counter.tcl >results
Using this command saves the simulation outputs to a text file called results. The Tcl script has supporting files that can be downloaded by clicking on the link below.
Counter Script
# opens the project
project open counter
# creates the simulation file (counter.ssf) if it does not already exist
if { ![project sim_exists counter] } {
project create_sim counter
}
# sets the simulation focus to "counter"
project set_active_sim counter
# adds some simulation assignments
sim add_assignment "" "" "" SIMULATION_MODE TIMING
sim add_assignment "" "" "" START_TIME 1ns
sim add_assignment "" "" "" END_TIME 1000ns
# initializes the simulator
sim initialize
# checks to see if initialization is done and prints out a message
while { ![sim is_initialized] } {
{FlushEventQueue}
}
# enters test bench mode so that no .vec and .wvf files are needed
sim testbench_mode true
####################################################################
# Start of the testbench #
####################################################################
# Initializes the inputs and prints their values before simulation
sim force_value aclr 0
sim force_value clk 0
sim print info "clk =
[sim get_value clk]"
sim print info "aclr = [sim get_value aclr]"
sim print info "q = [sim get_value q]"
sim print info "cout =
[sim get_value cout]" #
sets the input values for simulation and prints the results every 10ns for
{ set i 0} {$i < 50 } {incr i 1} {
sim force_value clk 0
sim run 10ns
sim print info "clk = [sim get_value clk]"
sim print info "aclr = [sim get_value aclr]"
# q is displayed in the form of a signed integer
sim print info "q = [sim get_value q]"
sim print info "cout = [sim get_value cout]"
sim force_value clk 1
sim run 10ns
sim print info "clk = [sim get_value clk]"
sim print info "aclr = [sim get_value aclr]"
# q is displayed in the form of a signed integer
sim print info "q = [sim get_value q]"
sim print info "cout = [sim get_value cout]"
}
####################################################################
# End of the testbench #
####################################################################
sim testbench_mode false
# runs the simulation until the end
sim run end
# prints out messages every 10ns
while { [sim is_running] } {
{FlushEventQueue}
}
Design Examples Disclaimer
These design examples may only be used within Altera Corporation devices and remain the property of Altera. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.
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