This example shows how to instantiate a memory block using the LPM function lpm_ram_dq. The variable ram uses the lpm_ram_dq function from the LPM library. The ports are initially defined and then mapped to the LPM ports, as shown in red text. The parameter values are then passed through with the keyword defparam. In this example, a 16 x 256 RAM block is instantiated; you can use a similar process to instantiate RAM blocks of other sizes.
The lpm_file parameter refers to the Memory Initialization File (.mif) that specifies the initial content of a memory block (RAM or ROM). An MIF is an ASCII text file can be created manually or saved from the output of a simulation. In an MIF, you are required to specify the memory depth and width values and optionally you can specify the radixes used to display and interpret addresses and data values. These values are shown in red text in the extract from the sample file, map_lpm_ram.mif, which is included below. An MIF is used as an input file for memory initialization in the MAX+PLUS II Compiler and Simulator.
For more information on using this example in your project, go to:
- How to Use Verilog HDL Examples
- MAX+PLUS® II Help
RAMveri.v
// instantiation of lpm_ram_dq, 16-bit data, 256 address location
module map_lpm_ram (dataout, datain, addr, we, inclk, outclk);
// port instantiation
input [15:0] datain;
input [7:0] addr;
input we, inclk, outclk;
output [15:0] dataout;
// instantiating lpm_ram_dq
lpm_ram_dq ram (.data(datain), .address(addr), .we(we), .inclock(inclk),
.outclock(outclk), .q(dataout));
// passing the parameter values
defparam ram.lpm_width = 16;
defparam ram.lpm_widthad = 8;
defparam ram.lpm_indata = "REGISTERED";
defparam ram.lpm_outdata = "REGISTERED";
defparam ram.lpm_file = "map_lpm_ram.mif";
endmodule
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Extract from the MIF file
Download map_lpm_ram.mif
WIDTH = 16; DEPTH = 256; ADDRESS_RADIX = HEX; DATA_RADIX = HEX; CONTENT BEGIN 0 : ffff; 1 : 0000; 2 : bbf3; 3 : 0000; 4 : 0000; . . . fb : 0000; fc : 0000; fd : 0000; fe : 0000; ff : 0000; END;
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