Altera Home Page
文档资料 许可
在线购买 下载

  主页   |   产品   |   支持   |   最终市场   |   技术中心   |   教育与活动   |   公司介绍   |   在线购买  
  mySupport   |   器件   |   软件   |   IP   |   设计范例   |   参考设计  

 嵌入式处理器
   Nios II 嵌入式设计套件
          Release Notes
       勘误表
               Nios II 7.1
               Nios II 7.0
               Nios II 6.1
               Nios II 6.0
            Nios II 5.1
                    Hardware
                    Software
                    Example Designs
                    Documentation
            Nios II 5.0.1
            Nios II 5.0
            Nios II 1.1
               Nios II Legacy SDK
          软件开发
          文档资料
      Nios II 开发套件
  
 DSP
      Overview
      DSP Builder
      IP Cores
      开发套件
  

5.1 Errata - Documentation

Error in UART Core with Avalon® Interface Chapter

The UART chapter of the Peripherals Handbook incorrectly states:

"When parity is Even, the parity bit is 1 if the character has an even number of 1 bits; otherwise, the parity bit is 0. Similarly, when parity is Odd, the parity bit is 1 if the character has an odd number of 1 bits."

This paragraph should read:

"When parity is Even, the parity bit is 1 if the number of 1's in the character plus the parity bit is even; otherwise, the parity bit is 0. Or, in other words, the Parity bit is set to '0' when there is an even number of '1' bits in the character. Similarly, when parity is Odd, the parity bit is 1 if the number of 1's in the character plus the parity bit has an odd number of 1 bits. Or, in other words, the Parity bit is set to '0' when there is an odd number of '1' bits in the character."

Nios® II IDE help system fails to display content

To display the help content, your computer must be able to recognize itself on the network. Incorrect proxy settings can cause the help content to fail to display.

Workaround: Specify valid browser proxy settings.

  请填写反馈意见
  注册索取最新邮件通知