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5.1 Errata - Example Designs

主页 > 支持 > IP > Nios II > 5.1 Errata - Example Designs

This section lists any issues related to the example designs included with the Nios® II development tools.

Hardware Examples

CycloneTM EP1C20 small example design does not function—Updated January 4, 2006

The small example design does not function properly because the reset and clock input pins are swapped.

Solution:  In the small.bdf design file, swap the reset and clock pins so that PLD_CLOCKINPUT[1] drives sys_clk, and the PLD_CLEAR_N drives reset_n.

Internal error regarding pin constraints files in Cyclone II example designs—Updated December 19, 2005

You may get the following error in the Quartus® II software while compiling the Nios II-Cyclone II standard or full-featured design:
"Critical Warning: Internal Error: pin_file /tools/megacore/5.1/9/ddr_ddr2_sdram-v3.3.0/lib/ip_toolbench/../../constraints/sopc_cycloneii_nios_pins.tcl not found"
This warning is due to residual files and paths for the DDR SDRAM Core left in the example design.

Workaround: Regenerate the system in SOPC Builder a second time to reset the appropriate paths. Recompile in the Quartus II software and you will not get the error message.

Quartus II errors when recompiling Cyclone II EP2C35 example designs containing DDR SDRAM Controller

If you do not regenerate designs containing the DDR SDRAM controller in SOPC Builder before recompiling the designs in the Quartus II software, the Quartus II compiler generates an error due to invalid library paths.

Workaround: Regenerate the EP2C35 example design in SOPC Builder before recompiling in the Quartus II software to setup the appropriate library paths for the DDR component.

Nios II software boots slowly on the full_featured example design for the Nios Development Board, Cyclone II Edition

The full_featured design for the Nios Development Board, Cyclone II Edition copies boot code from the EPCS serial configuration device, which is a slow memory interface. As a result, the Nios II boot time on this board might be noticeably slow.

Workaround: You can change the Nios II CPU configuration wizard settings in SOPC Builder so that the Nios II CPU boots from faster CFI-compliant flash memory on the board.

Software Examples

Memory Test software example fails to access Flash memory if the Flash memory device is full

There is an error in the memtest.c program that prevents it from successfully testing Flash memory when the Flash memory is full.

Workaround: Erase the flash memory and run the memory test again.

Networking Examples

Networking example design asks for a 9-digit number that the Nios II development board does not have

A networking example design asks for a 9-digit number after the letters 'ASJ', but the Nios II development board does not have a sticker with a 9-digit number after the letters 'ASJ.'

Workaround: If  your Nios II development board does not have a sticker with a 9-digit number after the letters 'ASJ', enter a unique 9-digit number when prompted. Ensure that this number is unique to each Nios board connected to your network to avoid network address conflicts.

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