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5.0 Release Notes - Hardware

Device & Host Support

This release supports the following Altera device families:

  • Stratix® II
  • Stratix
  • CycloneTM II
  • Cyclone

This release supports the following host environments:

  • Quartus® II software version 5.0
  • Windows XP Professional, Windows 2000, Windows NT 4.0, Linux 7.3, 8.0, and  Enterprise 3
  • ModelSim® versions supported on Windows: 5.8e OEM, 6.0c OEM, 6.0a SE, 6.0b SE, 6.0c SE, 6.1 SE
  • ModelSim versions supported on Linux: 6.0c OEM

SOPC Builder and Quartus II Software Support

This section documents changes related to SOPC Builder and Quartus II software.

Please refer to the Quartus II software version 5.0 Release Notes.

Peripheral Support

This section documents changes to the hardware peripherals included in the Nios II Development Kit.

LAN Component Reset Polarity Change

The LAN component reset signal polarity has been changed from negative to positive. If you have a design that uses the LAN component from Nios II version 1.1 and are updating the design to use Nios II version 5.0, you must do the following:

  • Remove the old LAN component from your Nios II system in SOPC Builder
  • Add the new LAN component to your Nios II system
  • Regenerate the system in SOPC Builder
  • Edit your top level file to ensure that the LAN reset signal is properly connected, (i.e., not inverted)
  • Recompile the design in Quartus II

DDR/DDR2 SDRAM Controller

Added support for using the DDR/DDR2 SDRAM Controller with Nios II.

Synchronous SRAM Controller

New component added to support Cypress CY7C1380C SSRAM device on Nios II Development Board, Cyclone II Edition.

Multiprocessor Mailbox Component

This release introduces a mailbox component for interprocessor coordination.  A HAL mailbox API has been added to allow message passing between CPUs.

Compact Flash Controller Peripheral

A new Compact Flash controller peripheral is included with Nios II processor version 5.0.  Drivers and examples are available on the Nios Forum.

SPI Slave Select

A problem with the serial peripheral interface (SPI) peripheral in previous versions caused the SPI master core to not select the correct slave device until a data transfer has started. The previous slave was selected again first, then the appropriate slave was selected.  This has been corrected in version 5.0.

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