解决方案ID: rd02272004_9228
最后修改: 2010 年2 月01 日
产品类别: 器件
产品领域: 配置(FPGA)
产品子领域: 其他(配置)
器件系列: CYCLONE

标题

Can you set the Power-on Reset (POR) time in Cyclone devices?

说明

No, Cyclone® devices do not have a PORSEL pin therefore, the POR delay is governed by the Cyclone device (typically 100 ms). During initial power-up, a POR delay occurs to ensure the system voltage levels have stabilized. During Active Serial (AS) configuration, the Cyclone device controls the configuration and has a longer POR delay than the serial configuration device.

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