10-Gbps Ethernet Reference Design

from Altera Corporation

The use of this design is governed by, and subject to, the terms and conditions of the Altera License Terms and Conditions for 10-Gbps Ethernet Reference Design.

Feature Rich

• Complete 10-Gbps Ethernet intellectual property (IP) with all the necessary IP modules
  • 10-Gbit media access controller (MAC), XAUI physical coding sublayer (PCS), and XAUI physical medium attachment (PMA) 
• Flexible IP options at synthesis for size and application optimization
  • MAC only, MAC + hard embedded or soft PCS + PMA, and soft PCS + PMA
  • Parameterizable FIFO (64 bytes to 64 Kbytes) and non-FIFO options for low latency
  • Standard-based statistics counters supporting SNMP Management Information Base (MIB and MIB-II) and remote network monitoring (RMON)
  • Management data I/Os (MDIOs)
  • Error correction coding (ECC) option for internal memory in IP
• Seamless external interface to external Ethernet PHY device
  • XAUI (4 bits at 3.125 Gbps) or XGMII (32 bits at 312.5 Mbps)
  • MDIO master interface for external PHY device management
• High-performance internal system interfaces
  • Altera Avalon^®-Streaming (Avalon-ST) 64-bit interface for data transfer
  • Altera Avalon Memory-Mapped Interface (Avalon-MM) 32-bit slave interface for register access

Ease of Use

• Complete 10-Gbps Ethernet protocol solution available to start your design quickly
  • Development boards
  • Reference design
  • IP functional simulation models for use in VHDL and Verilog HDL simulators supported by Altera 
  • Verification test bench and example design
• Easy IP configuration and generation using Altera^® MegaWizard^® Plug-in Manager GUI software
• Easy system integration with Altera SOPC Builder software
• Quick and easy licensing for your evaluation

Robust Solution

• IEEE802.3ae-2005 Ethernet standard compliant 
• Passed the University of New Hampshire Interoperability Lab (UNH) 10 Gigabit Ethernet tests of MAC, PCS, and PMA
• Extensively verified in simulation and tested in hardware with third-party test equipment

Description

As the leading and only provider of 10-Gbps Ethernet in 40-nm FPGA devices, Altera offers a 10-Gbps Ethernet (10-GbE) reference design for designers to easily build systems with a very high throughput rate Ethernet connection. Altera 10-GbE consists of a 10-Gbit MAC and optionally a 10GBASE-X PCS and PMA. This IP enables an Altera device to interface to an external 10-Gbit Ethernet PHY device, which in turn interfaces to the 10-Gbit Ethernet network.

This reference design provides an XGMII or XAUI external interface to easily connect the system logic to a variety of standard 10-GbE PHY devices and optical transceiver modules. The 10GBASE-X XAUI PCS option and XAUI interface can be implemented in hard silicon in Altera FPGAs with gigabit serial transceivers. Stratix^® IV GT FPGAs are the first and only FPGAs that support 10-Gbit Ethernet with 10-Gbps serial transceivers to interface directly to 10-Gbps XFI modules or through EDC chips to SFP+ modules depending on channel quality. Figures 1 and 2 illustrate examples of Altera 10-GbE reference designs with possible configurations in different Altera devices with XAUI, XGMII and 10.3-Gbps XFI interfaces, respectively.

Figure 1. 10-GbE Reference Design in an Altera FPGA with XAUI or XGMII Interface

View Full Size

Figure 2. 10-GbE Reference Design in Altera Stratix IV GT FPGA with 10-Gbps Serial Transceivers

View Full Size

Protocol Solution

• Detailed documentation on how to use the reference design
  • AN516: 10-Gbps Ethernet Reference Design (PDF)
• Step-by-step instructions to get started
• Complete description of Altera device capabilities
  • Stratix IV FPGA
  • Arria^® II GX FPGA
  • Cyclone IV FPGA 
  • HardCopy^® IV ASIC
• Free online training: 10-Gbit Ethernet Design with Altera 40nm Devices
• Example design for quick and easy design start in AN516: 10-Gbps Ethernet Reference Design (PDF)
• For latest UNH test reports contact your local Altera sales representative
• For other 10-Gbit solutions see Altera Wireline Solutions

Performance

Typical expected performance and utilization figures for this core are provided in the AN516: 10-Gbps Ethernet Reference Design (PDF).

Technical Support

For technical support on this reference design, please visit the 10-Gbps Ethernet Reference Design Support Center. Additional support is available in the Altera mySupport online issue tracking system. You may also search for related topics on this function in the Altera Solutions Database.

Reference Designs Disclaimer

These reference design illustrations may be used within Altera devices only and remain the copyrighted property of Altera Corporation.