Serial RapidIO to PCI Bridge Reference Design
from Jennic Ltd
Overview
The Serial RapidIOTM to PCI Bridge provides the capability to bridge between a Serial RapidIO interface and a PCI interface. It is part of a family of devices that are intended for applications which are currently based on legacy interface standards, such as PCI, but need to use a switched serial interconnect, such as Serial RapidIO.
The Serial RapidIO to PCI Bridge transparently converts PCI memory read and write transfers into RapidIO I/O or maintenance transactions. It appears as eight PCI windows, each of which can be mapped to different RapidIO destinations. Received RapidIO I/O transactions are converted to PCI memory accesses using an integrated DMA controller.
The bridge utilizes Jennic's RapidIO and PCI Interface intellectual property (IP) cores and the semiconductor vendor's on-chip SERDES/transceivers. Jennic's RapidIO IP core product line provides a range of complete, fully integrated RapidIO interface solutions to address a wide range of applications including endpoints and switches. These are based around a common, modular architecture and implement the physical, transport, and logical layer RapidIO standards and are suitable for implementation in a range of Altera® technologies including devices from the Stratix®, Stratix GX and HardCopy® product families.
Features
- Fully transparent bridge between
- 1x/4x Serial RapidIO interface
- 32-bit @ 66-MHz PCI (2.2) interface
- RapidIO serial physical layer features
- Operating rates of 1.25, 2.5, or 3.125 Gbaud per lane
- Operates in either 1x or 4x mode
- RapidIO transport and logical layer features
- Supports the following RapidIO transactions
- NREAD
- NWRITE
- NWRITE_R
- SWRITE
- RESPONSE
- Maintenance
- PCI Interface Features
- 32-bit @ 66-MHz PCI (2.2) interface
- PCI initiator and target functionality
- Supports PCI configuration and memory read and write commands
- Eight transparent 2-Mbyte PCI host windows
- General
- Verified against RapidIO Trade Association bus-functional models
- Interoperability tested against third-party solutions
- PCI/HIP evaluation platform available
Demonstrated Altera Technology
Block Diagram
Figure 1. Serial RapidIO to PCI Bridge Reference Design
Contact Information
For additional information, please contact:
Jennic Ltd
Furnival St.
Sheffield
S1 4QT
UK
Phone: +44 (0) 114 281 2655
Fax: +44 (0) 114 281 2951
Email: info@jennic.com
URL: http://www.jennic.com
Reference Designs Disclaimer
These reference design illustrations remain the copyrighted property of Altera and may be used within Altera Corporation devices only. They are being provided on an "as-is" basis and as an accommodation, and therefore all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera.
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