Altera® SPICE kits enable you to perform system-level simulations for various configurations that make use of Altera devices. The SPICE kits provide models that support a wide variety of I/O features across process, voltage, and temperature (PVT). Each SPICE kit contains the following information:
- Encrypted transistor and logic cell library models
- Encrypted input/output buffer circuit models for single-ended and differential I/O
- Single-ended and differential sample SPICE decks
- User guide describing the model usage
| Table 1. Altera Device SPICE Models | |||||
| Device Family | Part Number Prefix |
SPICE Model Type |
SPICE Model | Model Revision |
Last Models Update |
|---|---|---|---|---|---|
| Arria® GX | EP1AGX | Transceiver—Synopsys HSPICE | arriagx_hssi_hspice_models_kit.zip | 2.0 | 04/2008 |
| Arria II GX | EP2AGX | I/O—Synopsys HSPICE | arria2gx_io_hspice_models_kit.zip | 1.0 | 12/2009 |
| Cyclone® | EP1C | I/O—Synopsys HSPICE | cyclone_i/o_hspice_models_kit.zip | 1.1 | 04/2003 |
| Cyclone II | EP2C | I/O—Synopsys HSPICE | cyclone2_i/o_hspice_models_kit.zip | 3.0 | 01/2006 |
| Cyclone III | EP3C | I/O—Synopsys HSPICE | cyclone3_io_hspice_models_kit.zip | 1.0 | 03/2008 |
| HardCopy® Stratix® | HC1S | I/O—Synopsys HSPICE | hardcopy_stratix_i/o_hspice_models_kit.zip | 1.0 | 05/2004 |
| HardCopy II | HC2 | I/O—Synopsys HSPICE | 1.0 | 02/2007 | |
| MAX® II | EPM | I/O—Synopsys HSPICE | max2_i/o_hspice_models_kit.zip | 2.0 | 12/2004 |
| Stratix | EP1S | I/O—Synopsys HSPICE | stratix_i/o_hspice_models_kit.zip | 1.2 | 01/2003 |
| Stratix II | EP2S | I/O—Synopsys HSPICE | stratix2_i/o_hspice_models_kit.zip | 4.0 | 12/2005 |
| Stratix III | EP3S | I/O—Synopsys HSPICE | stratix3_i/o_hspice_models_kit.zip | 1.0 | 04/2008 |
| Stratix GX | EP1SGX | I/O—Synopsys HSPICE | stratix_i/o_hspice_models_kit.zip (Stratix GX FPGAs have the same HSPICE model as Stratix FPGAs) |
1.2 | 01/2003 |
| Transceiver | Please contact your Altera support representative to obtain the transceiver models |
- | - | ||
| Stratix II GX | EP2SGX | I/O—Synopsys HSPICE | stratix2gx_io_hspice_models_kit.zip | 1.0 | 08/2006 |
| Transceiver—Synopsys HSPICE | stratix2gx_hssi_hspice_models_kit.zip | 0.2 | 03/2007 | ||
| Transceiver—Mentor Hyperlynx | HL_Altera_s2gx_mgc_design_kit.zip | 1.0 | 01/2008 | ||
| Transceiver—Cadence Allegro PCB SI | Cadence_SIIGX_Kit_0p3.zip | 1.0 | 01/2008 | ||
| Transceiver—Agilent ADS | Stratix_II_GX_Ver1_01_user.zip | 1.1 | 07/2008 | ||
| Stratix IV | EP4S | I/O—Synopsys HSPICE | stratix4_io_hspice_models.zip | 1.0 | 12/2009 |
| Stratix IV GT | EP4SG | Transceiver—Synopsys HSPICE | stratix4gt_hssi_hspice_models_kit.zip | 1.0 | 12/2009 |
| Stratix IV GX | EP4SGX | Transceiver—Synopsys HSPICE | stratix4gx_hssi_hspice_models_kit.zip | 1.0 | 12/2009 |
| Transceiver—Agilent ADS | stratix4gx_hssi_ads_models_kit.zip | 1.0 | 12/2009 | ||
| Transceiver—Mentor Hyperlynx | stratix4gx_hssi_eldo_models_kit.zip | 1.0 | 12/2009 | ||
| Transceiver—Cadence Spectre | Coming soon | ||||
| Transceiver—Behavioral Model Verilog-A (runs on HSPICE) | Please contact your Altera support representative to obtain these models | ||||
