Creating Verilog HDL Designs for Use with MAX+PLUS II Software
You can create Verilog HDL design files with the MAX+PLUS® II Text Editor, the FPGA Express internal text editor, or another standard text editor and save them in the appropriate directory for your project. The MAX+PLUS II and FPGA Express text editors offer different advantages; use either or both depending on your personal preferences:
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- The MAX+PLUS II Text Editor offers Verilog HDL templates with the Verilog HDL Templates command (Templates menu) and syntax coloring with the Syntax Coloring command (Options menu).
- The FPGA Express internal text editor provides automatic error location when you double-click an error in the Output window.
To create a Verilog HDL design that can be synthesized and optimized with the FPGA Express software, follow these steps:
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- Describe your design using FPGA Express-supported Verilog HDL constructs. For information on synthesizable Verilog HDL constructs, refer to the online HDL Reference Manual provided with the FPGA Express software. The following topics describe how to instantiate additional Altera-specific logic functions in your design:
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You can instantiate MegaCore™ functions offered by Altera or by members of the Altera Megafunction Partners Program (AMPP™). The OpenCore™ feature in the MAX+PLUS II software allows you to instantiate, compile, and simulate MegaCore functions before deciding whether to purchase a license for full device programming and post-compilation simulation support. |
- Once you have created a design, synthesize and optimize it, as described in Synthesizing & Optimizing VHDL or Verilog HDL Files with FPGA Express Software.
Related Links:
- Compiling Projects with MAX+PLUS II Software in these MAX+PLUS II ACCESSSM Key topics for related information.
- Go to the following topics for additional information:
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Altera does not warrant that this solution will work for the customer's intended purpose and disclaims all liability for use of or reliance on the solution.
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