Libraries that contain simulation models for Altera-specific megafunctions.
For VHDL-93 compliant designs, use altera_mf.vhd. For VHDL-87 compliant designs, use altera_mf_87.vhd.
arriagx_hssi_atoms.v
arriagx_hssi_atoms.vhd
Libraries that contain simulation models for Arria GX designs that contain the alt2gxb megafunction.
Note: If you have not already done so, instantiate the alt2gxb megafunction in the MegaWizard Plug-In Manager. You must turn on the option to Generate simulation model in the Summary dialog box in order to generate a Verilog Output File (.vo) or VHDL Output File (.vho).
For Verilog designs, you must compile the 220model.v and sgate.v simulation model libraries (in that order) before compiling this library.
For VHDL designs, you must compile the 220pack.vhd, 220model.vhd, sgate_pack.vhd, and sgate.vhd simulation model libraries (in that order) and then compile the arriagx_hssi_components.vhd.
stratixgx_mf.v
stratixgx_mf.vhd
Libraries that contain simulation models for Stratix GX designs that contain the altgxb megafunction.
For Verilog designs, you must compile the 220model.v and sgate.v simulation model libraries (in that order) before compiling this library.
For VHDL designs, you must compile the 220pack.vhd, 220model.vhd, sgate_pack.vhd, and sgate.vhd simulation model libraries (in that order) before compiling these libraries.
Libraries that contain simulation models for Stratix II GX designs that contain the alt2gxb megafunction.
Note: If you have not already done so, instantiate the alt2gxb megafunction in the MegaWizard Plug-In Manager. You must turn on the option to Generate simulation model in the Summary dialog box in order to generate a Verilog Output File (.vo) or VHDL Output File (.vho).
For Verilog designs, you must compile the 220model.v and sgate.v simulation model libraries (in that order) before compiling this library.
For VHDL designs, you must compile the 220pack.vhd, 220model.vhd, sgate_pack.vhd, and sgate.vhd simulation model libraries (in that order) and then compile the stratixiigx_hssi_components.vhd.
Note:
If your design contains the altgxb megafunction, you must set the value of the pll_areset signal to start high in the test bench or waveform file for the design. If the megafunction does not instantiate a GXB transmitter PLL, you must set the values of the rx_analogreset and rx_digitalreset signals to start high.. If you are using the alt2gxb megafunction.
If your design contains the alt2gxb megafunction, Altera recommends that you set the value of the gxb_powerdown signal to start high in the test bench or waveform file for the design. If the instantiated alt2gxb megafunction does not use gxb_powerdown signal, Altera requires that you set the values of the tx_digitalreset, rx_analogreset, and rx_digitalreset signals to start high. Assert tx_digitalreset long enough so that it can be registered by tx_clkout and assert rx_digitalreset a few clock cycles longer than rx_analogreset so that it can be registered by rx_clkout. Altera requires that you apply the same reset sequence mentioned above after dynamic channel reconfiguration.
The following libraries are VITAL-Compliant functional simulation libraries for use with designs synthesized with the Synopsys Design Compiler software:
The \quartus\eda\synopsys\sim\vhdl\vital directory contains Altera-provided VHDL simulation models in VITAL 95 format. This library contains functional descriptions of all primitives that appear in Altera-specific technology libraries. These libraries allow you to perform a functional simulation that verifies the netlist structure generated by the Synopsys Design Compiler software. Altera provides the flex.cmp and flex.vhd files in the \quartus\eda\synopsys\sim\vhdl\vital directory.
Similarly, the \quartus\eda\synopsys\sim\verilog\altera directory contains Altera-provided Verilog HDL simulation models for all Altera devices supported by the Quartus II software.
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